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EE354 Microprocessors 3/4 BE, EEE, Semester II: Syllabus

This document outlines the syllabus for the EE354 Microprocessors course. It is divided into 5 units that cover the architecture and instruction set of the 8085 microprocessor, assembly language programming, memory and I/O interfacing, interrupt-driven data transfer including DMA, and the 8086 microprocessor architecture. Students will be evaluated through instruction/tutorials, a 3-hour university exam worth 75 marks, and sessionals worth 25 marks. Suggested reading materials are provided.

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0% found this document useful (0 votes)
26 views7 pages

EE354 Microprocessors 3/4 BE, EEE, Semester II: Syllabus

This document outlines the syllabus for the EE354 Microprocessors course. It is divided into 5 units that cover the architecture and instruction set of the 8085 microprocessor, assembly language programming, memory and I/O interfacing, interrupt-driven data transfer including DMA, and the 8086 microprocessor architecture. Students will be evaluated through instruction/tutorials, a 3-hour university exam worth 75 marks, and sessionals worth 25 marks. Suggested reading materials are provided.

Uploaded by

Prafull B
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EE354 Microprocessors 3/4 BE, EEE, Semester II Syllabus

Instructor: Dr. Moorthy Muthukrishnan Professor, EEE Dept. CBIT, Hyderabad CBIT H derabad

EE 354

Syllabus
Unit I Microprocessor Architecture of 8085 Instruction cycle, Machine cycle Instruction set g g Timing diagram

2 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

EE 354

Syllabus
Unit II 8085 Assembly language Programming 8085 Machine code programming Simple programs Loops p g Arithmetic programs BCD to binary, binary to BCD conversion g g Sorting and searching subroutines Delays, counters
3 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

EE 354

Syllabus
Unit III Memory interfacing ROM, SRAM I/O interfacing Memory mapped I/O and I/O mapped I/O scheme Programmable peripheral chips 8255, 8212, 8155 7-segment LEDs, DAC, ADC interfacing

4 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

EE 354

Syllabus
Unit IV Data transfer schemes programmed data transfer Interrupt structure, masking of interrupts SIM, RIM Interrupt drives Data transfer DMA data transfer Programmable interrupt controller 8259 Programmable DMA controller chip 8237 Serial Data transmission 8251 Communication interface
5 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

EE 354

Syllabus
Unit V 8086 Microprocessor architecture Segmented memory Addressing modes Instruction set p p g Simple programs

6 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

EE 354

Evaluation
Instruction/Tutorials Duration of Exam University Exam y Sessionals - 4+1 periods/week - 3 hours - 75 marks - 25 marks

Suggested Reading
1. Ramesh S. Gaonkar Microprocessor Architecture, Programming, and Applications with the 8085, 8080A, Fourth Edition, Wiley Eastern Ltd.. Ltd Badri Ram, Advanced Microprocessors and Interfacing, TataMcGraw Hill, 2003. Walter A T i b l d A W l A. Triebel and Avatar Singh, The 8088 and 8086 Si h Th d Microprocessor, Prentice-Hall of India Ltd., New Delhi, 1995. Aditya P. Mathur, Introduction to Microprocessors, 3rd ed., TataMcGraw Hill 1995. M G Hill, 1995
7 Dr. Moorthy M., EEE Dept, CBIT, Hyderabad

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