Simplification of Boolean Functions: Example 1
Simplification of Boolean Functions: Example 1
Example 1
= = = =
A.B + A.B + B.C A. (B + B) + B.C A.1 + B.C A + B.C How many gates do you save from this simplification?
B B F C
Example 2 F = = = = = A.B.C + A.B.C + A.B.C + A.B.C A.B.C + A.B.C + A.B.C + A.B.C + A.B.C + A.B.C (A.B.C + A.B.C) + (A.B.C + A.B.C) + (A.B.C + A.B.C) (A + A). B.C + (B + B). C.A + (C + C). A.B B.C + C.A + A.B
Example 3
A + AB = = = = A.1 + A.B A. (1 + B) A. 1 A
Follow the class lectures to understand how to simplify Boolean functions using K-maps. Several examples will be worked out in the class.
A A.B B
A B A+B
NAND gate
NOR gate
A B A + B = A.B + A.B
Any function can be implemented using only NAND or only NOR gates. How can we prove this?
can be implemented using AND, OR and NOT gates. So if AND, OR and NOT gates can be implemented using NAND gates only, then we prove our point.
A B
A.B A
A.B = A+B B B
Example (to be worked out in class) How to convert any circuit that uses AND, OR and NOT gates to a version that uses NAND (or NOR gates only)?
A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
F 0 1 1 0 1 0 0 1
A B = 1 only when there are an odd number of 1s in (A,B). The same is true for A B C also.
1 0
A=A A=A
Why?
Half Adder
A A B
Half Adder
B 0 1 0 1
S 0 1 1 0
C 0 0 0 1
0 0 1
S=A C = A.B
A S B C
Full Adder
A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
S 0 1 1 0 1 0 0 1
Cout 0 0 0 1 0 1 1 1
S=A
Cin
How can you add two 32-bit numbers? It will be discussed in the class.
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Combinational circuits. The output depends only on the current values of the inputs and not on the past values. Examples are adders, subtractors, and all the circuits that we have studied so far
Sequential circuits. The output depends not only on the current values of the inputs, but also on their past values. These hold the secret of how to memorize information. We will study sequential circuits later.
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Decoders
Enable D0 A B D1 D2 D3
A 0 0 1 1
B 0 1 0 1
D3 D2 D1 0 0 0 1 0 0 1 0 0 1 0 0
D0 1 0 0 0
The decoder works per specs when (Enable = 1). When Enable = 0, all the outputs are 0.
Exercise.
Encoders
A typical encoder has 2 inputs and n outputs.
n
D0 D1 D0 D1 D2 D3 A B 1 0 0 0 0 1 0 0
D2 D3 A 0 0 1 0 0 0 0 1 0 0 1 1
B 0 1 0 1
A = D1 + D3 B = D2 + D3
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Multiplexor
A B
0 1
S = 0, F = A S = 1, F = B
Control S
A 2-to-1 mux
F = S. A + S. B
Exercise.
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A B C D
D0 D1 D2 D3
2-to-4 decoder
Exercise 1. Design a 2-to-4 decoder using 1-to-2 decoders only. Exercise 2. Design a 4-to-1 multiplexor using 2-1 multiplexors only.
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Demultiplexors
X Y
S = 0, X = A S = 1, Y = B
A
1
So, X = S. A, and Y = S. B
Exercise.
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