Scribd
Upload
740 views9 pages

Carry Skip Adder

This document describes a carry skip adder circuit. A carry skip adder is composed of cascaded full adders with additional carry logic to potentially skip over intermediate carry propagations, improving delay compared to a ripple carry adder under optimal conditions. The carry skip adder uses a multiplexer with inputs of the carry in and ripple carry out, selecting between them based on the AND of the bit-wise XORs of the input bits. An example 8-bit carry skip adder module is shown by cascading four 2-bit carry skip adder modules. Carry skip adders have slightly higher overhead than ripple carry adders but better average performance that increases with larger adder widths.

Uploaded by

Simranjeet Singh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
740 views9 pages

Carry Skip Adder

This document describes a carry skip adder circuit. A carry skip adder is composed of cascaded full adders with additional carry logic to potentially skip over intermediate carry propagations, improving delay compared to a ripple carry adder under optimal conditions. The carry skip adder uses a multiplexer with inputs of the carry in and ripple carry out, selecting between them based on the AND of the bit-wise XORs of the input bits. An example 8-bit carry skip adder module is shown by cascading four 2-bit carry skip adder modules. Carry skip adders have slightly higher overhead than ripple carry adders but better average performance that increases with larger adder widths.

Uploaded by

Simranjeet Singh
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 9

CME 433

Simon Fanner Patrick Weckworth

Designed to improve the delay of a ripplecarry adder. Under optimal conditions, propagation is reduced by passing carry-in to carry-out Composed of cascaded full adders with additional carry logic circuitry

Consider A+ B, for 2 bits: If (A[0] B[0]) & (A[1] B[1])


The carry out = The carry in

Else
The carry out = ripple carry out

The result for any number of bits is a multiplexer:


Multiplexer inputs: carry in, ripple carry Multiplexer Select: &(A B)

module carry_skip_adder(input [1:0] X, Y, input Cin, output [1:0]S, output reg Cout, Pf); reg P[1:0]; wire C[1:0];
always @ * P[0] = X[0] ^ Y[0]; always @ * P[1] = X[1] ^ Y[1]; always @ * Pf = P[1] & P[0]; always @ * case (Pf) 1'b0: Cout = C[1]; 1'b1: Cout = Cin; endcase ripple_carry_adder RCA0(X[0], Y[0], Cin, S[0], C[0]); ripple_carry_adder RCA1(X[1], Y[1], C[0], S[1], C[1]); endmodule

Just cascades four 2-bit adders together:

module eight_bit_carry_skip(input [7:0] A,B, input Cin, output Cout, output [7:0] S); wire[2:0] C; carry_skip_adder c1(A[1:0], B[1:0], Cin, S[1:0], C[0]); carry_skip_adder c2(A[3:2], B[3:2], C[0], S[3:2], C[1]); carry_skip_adder c3(A[5:4], B[5:4], C[1], S[5:4], C[2]); carry_skip_adder c4(A[7:6], B[7:6], C[2], S[7:6], Cout); endmodule

Carry skip adders have:


Small extra overhead (gates/LUTs) Worst-case same as ripple carry adder

Average performance faster than carry ripple

adder Greater performance increase with increasing adder width

You might also like