VSB ENGINEERING COLLEGE KARUR 639111

V SEM III Year B.E. MECHANICAL ENGINEERING ELECTRONICS AND MICROPROCESSOR LABORATORY LAB MANUAL

Prepared By J. Cyril Robinson Azariah Assistant Professor, ECE & C. Moorthy Lecturer, ECE

Prepared by J.Cyril Robinson Azariah & C.Moorthy

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CONTENTS
Exp. No. Date Name of the Experiments Page No. Marks Award Faculty Sign.

CYCLE I - ELECTRONICS EXPERIMENTS 1.(a) 1.(b) 2. 3. 4. 5. 6. VI Characteristics of PN Junction Diode VI Characteristics of Zener Diode Characteristics Study Of Common Emitter Configuration of a npn type Bipolar Junction Transistor (BJT) Design of an RC Phase Shift Oscillator Using Opamp IC 741 Verification and Study of Logic Gates Design of Half Adder and Full Adder Using Logic Gates Study and Construction of Flip- Flops Using Logic Gates 4 7 11 15 19 26 28

CYCLE II - MICROPROCESSOR EXPERIMENTS 7.(a) 7.(b) 8. 9. 10. 11. 8-bit Addition and Subtraction Using 8085 Microprocessor 8-bit Multiplication and Division Using 8085 Microprocessor Finding Smallest Number and largest Number from the Array of Numbers Using 8085 Microprocessor Sorting an Array of Numbers in Ascending and descending Order Using 8085 Microprocessor Transferring Block of Data Using 8085 Microprocessor Stepper Motor Interfacing Using 8085 Microprocessor 33 40 44 47 51 53

Appendix: 8085 Op-code Sheet Viva Questions & Answers

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CYCLE I EXPERIMENTS ELECTRONICS

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Ex. No. 1. (a) Date:

VI Characteristics of PN Junction Diode

Aim: To plot the VI characteristics of a PN Junction Diode Apparatus Required: S.No. 1. 2. 3. 4. 5. 6. 7. Name of the Apparatus Ammeter Voltmeter Resistor PN Junction Diode Regulated Power Supply Bread-Board Connecting Wires Range/Type (0-100)mA (0-500)A (0-1)V (0-30)V 220 1N4007 (0-30)V Quantity 1 1 1 1 1 1 1 1 Few

Procedure: 1. Wire up the circuit shown in circuit diagram of the forward biased diode. 2. Record the voltage across the diode (V) and current (I) through it as a function of input voltage. 3. Repeat the experiment of the reverse biased diode. 4. Plot the relevant graphs. 5. Plot it along with I-V characteristics of forward biased PN Junction Diode. Diode Symbol:

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Circuit Diagram: Forward Biased:

Reverse Biased:

Tabulation: Forward Bias Voltage (VF) volts Current (IF) mA Reverse Bias Voltage (VR) volts Current (IR) A

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Model Graph:

Theory: The PN junction region of a Junction Diode has the following important characteristics:
1) Semiconductors 2) 3)

4) 5) 6) 7)

8)

9)

contain two types of mobile charge carriers, Holes and Electrons. The holes are positively charged while the electrons negatively charged. A semiconductor may be doped with donor impurities such as Antimony (Ntype doping), so that it contains mobile charges which are primarily electrons. A semiconductor may be doped with acceptor impurities such as Boron (Ptype doping), so that it contains mobile charges which are mainly holes. The junction region itself has no charge carriers and is known as the depletion region. The junction (depletion) region has a physical thickness that varies with the applied voltage. When a diode is Zero Biased no external energy source is applied and a natural Potential Barrier is developed across a depletion layer which is approximately 0.5 to 0.7v for silicon diodes and approximately 0.3 of a volt for germanium diodes. When a junction diode is Forward Biased the thickness of the depletion region reduces and the diode acts like a short circuit allowing full current to flow. When a junction diode is Reverse Biased the thickness of the depletion region increases and the diode acts like an open circuit blocking any current flow, (only a very small leakage current).

Result:
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Ex. No. 1. (b) Date:

VI Characteristics of Zener Diode

Aim: To plot the VI characteristics of a Zener Diode Apparatus Required: S.No. 1. 2. 3. 4. 5. 6. 7. Name of the Apparatus Ammeter Voltmeter Resistor Zener Diode Regulated Power Supply Bread-Board Connecting Wires Range/Type (0-100)mA (0-500)A (0-1)V (0-30)V 330 1N47XX (0-30)V Quantity 1 1 1 1 1 1 1 1 Few

PROCEDURE: Static characteristics:1. Connections are made as per the circuit diagram. 2. The Regulated power supply voltage is increased in steps. 3. The zener current (lz), and the zener voltage (Vz.) are observed and then noted in the tabular form. 4. A graph is plotted between zener current (Iz) and zener voltage (Vz). Regulation characteristics:1. The voltage regulation of any device is usually expressed as percentage regulation 2. The percentage regulation is given by the formula ((VNL-VFL)/VFL)X100 VNL=Voltage across the diode, when no load is connected. VFL=Voltage across the diode, when load is connected.
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3. Connection are made as per the circuit diagram 4. The load is placed in full load condition and the zener voltage (Vz), Zener current (lz), load current (IL) are measured. 5. The above step is repeated by decreasing the value of the load in steps. 6. All the readings are tabulated. 7. The percentage regulation is calculated using the above formula OBSERVATIONS:Static characteristics:S.NO ZENER VOLTAGE(VZ) ZENER CURRENT(IZ)

Regulation characteristics:-

S.N0

VNL(VOLTS)

VFL (VOLTS)

RL (K)

% REGULATION

Diode Symbol:

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Circuit Diagram: Forward Biased:

Reverse Biased:

Model Graph:

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Theory: A Zener Diode is a special kind of diode which permits current to flow in the forward direction as normal, but will also allow it to flow in the reverse direction when the voltage is above a certain value - the breakdown voltage known as the Zener voltage. The Zener voltage of a standard diode is high, but if a reverse current above that value is allowed to pass through it, the diode is permanently damaged.Zener diodes are designed so that their zener voltage is much lower - for example just 2.4 Volts. When a reverse current above the Zener voltage passes through a Zener diode, there is a controlled breakdown which does not damage the diode. The voltage drop across the Zener diode is equal to the Zener voltage of that diode no matter how high the reverse bias voltage is above the Zener voltage. The illustration above shows this phenomenon in a Current vs. Voltage graph. With a zener diode connected in the forward direction, it behaves exactly the same as a standard diode - i.e. a small voltage drop of 0.3 to 0.7V with current flowing through pretty much unrestricted. In the reverse direction however there is a very small leakage current between 0V and the Zener voltage - i.e. just a tiny amount of current is able to flow. Then, when the voltage reaches the breakdown voltage (Vz), suddenly current can flow freely through it.

Result: a) Static characteristics of zener diode are obtained and drawn. b) Percentage regulation of zener diode is calculated.

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Ex. No. 2 Date:

Characteristics Study Of Common Emitter Configuration of a npn type Bipolar Junction Transistor (BJT)

Aim: To plot the input and output characteristics of Bipolar Junction Transistor (BJT) in Common Emitter mode Configuration and to find the Input Impedance (Ri), Output Admittance (Ro), Forward Current Gain (hfc) and Reverse Voltage Gain (hrv) Apparatus Required: S.No. 1. 2. 3. 4. 5. 6. 7. Name of the Apparatus Ammeter Voltmeter Resistor Bipolar Junction Transistor (BJT) Regulated Power Supply Bread-Board Connecting Wires Range/Type (0-30)mA (0-500)A (0-1)V (0-10)V 330 BC107 (0-30)V Quantity 1 1 1 1 1 1 1 1 Few

Procedure: 1. Connections are given as per the circuit diagram. 2. Power supplies are switched ON. 3. To determine the input characteristics: a) VCB is kept constant by using the power supply Vcc. b) VBE is varied by using the power supply VBB and the corresponding variations in IB is noted. c) The above step is repeated for different values of VCB. 4. To determine the output characteristics: a) IB is kept constant by using the power supply VCC and the corresponding value in IC is noted.
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b) VCE is varied by using the power supply and the corresponding value in I C is noted. c) The above step is repeated for different values of I B. 5. Graph is plotted using the tabulation. Formulae Used: Input Impedance ri = VBE/IB [Unit ohm ()] Output Admittance ro=IC /VCE [Unit mho (-1)] Forward Current Gain hfc=IC/IB [No Unit] Reverse Voltage Gain hrv=VBE/VCE [No Unit] Circuit Diagram:

THEORY: A transistor is a three terminal device. The terminals are emitter, base, collector. In common emitter configuration, input voltage is applied between base and emitter terminals and out put is taken across the collector and emitter terminals. Therefore the emitter terminal is common to both input and output. The input characteristics resemble that of a forward biased diode curve. This is expected since the Base-Emitter junction of the transistor is forward biased. As compared to CB arrangement I B increases less rapidly with VBE. Therefore input resistance of CE circuit is higher than that of CB circuit. The output characteristics are drawn between Ic and VCE at constant IB. the collector current varies with VCE unto few volts only.
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After

this

the

collector

current becomes

almost

constant, and

independent of VCE. The value of VCE up to which the collector current changes with V CE is known as Knee voltage. The transistor always operated in the region above Knee voltage, IC is always constant and is approximately equal to IB. The current amplification factor of CE configuration is given by = IC/IB MODEL GRAPHS: INPUT CHARACTERSTICS:

OUTPUT CHARECTERSTICS:

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PRECAUTIONS: 1. The supply voltage should not exceed the rating of the transistor 2. Meters should be connected properly according to their polarities RESULT: 1. the input and out put characteristics of a transistor in CE configuration are Drawn 2. the of a given transistor is calculated as

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Ex. No. 3 Date:

Design of an RC Phase Shift Oscillator Using Opamp IC 741

Aim: To design an RC phase shift Oscillator using Opamp IC 741 Apparatus Required: S.No. 1. 2. Name of the Apparatus Op Amp Resistors Range/Type IC 741 1K, 10K, 3. 4. 5. 6. 7. Resistor (Use Decade Resistance Box) DC Power Supply CRO Bread-Board Connecting Wires 290K -12V-0V-+12V Digital Quantity 1 3 1 1 1 1 1 Few

IC 741 Pin Diagram:

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Circuit Diagram:

Model Graph:

Observation: Amplitude Time Period Practical Frequency

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Tabulation: S.NO THEORETICAL FREQUENCY PRACTICAL FREQUENCY OUTPUT VOLTAGE

Design: The attenuation, B of the three section RC feedback circuit is B = 1/29 Where, B=R1/Rf=1/29. Then Rf=29*R1, R1 = 10*R and the frequency of oscillation (fo) is given by Theory: RC phase shift oscillator is a sinusoidal oscillator used to produce sustained well shaped sine wave oscillations. It is used for different applications such as local oscillator for synchronous receivers, musical instruments, study purposes etc. The main part of an RC phase shift oscillator are an op amp inverting amplifier with its output fed back into its input using a regenerative feedback RC filter network, Hence the name RC phase shift oscillator. By varying capacitor, the frequency of oscillations can be varied. The feedback RC network has a phase shift of 60 degrees each. Hence total phase shift provided by the three RC network is 180 degrees. The op amp is connected as inverting amplifier hence the total phase shift around the loop will be 360 degrees. This condition is essential for sustained oscillations. Working of RC Phase shift oscillator

The feedback network offers 180 degrees phase shift at the oscillation frequency, and the op amp is configured as an Inverting amplifier it also provide 180 degrees phase shift. Hence to total phase shift around the loop is 360=0degrees, it is essential for sustained oscillations. At the oscillation frequency each of the resistor capacitor filter produces a phase shift of 60 so the whole filter circuit produces a phase shift of 180. The energy storage capacity of capacitor in his circuit produces a noise voltage which is similar to a small sine wave, it is then amplified using op amp inverting amplifier.

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By taking feedback, the output sine wave also attenuates 1/29 times while passing through the RC network, so the gain of inverting amplifier should be 29 in order to keep loop gain as unity. The unity loop gain and 360 degree phase shift are essential for the sustained oscillation. RC Oscillators are stable and provide a well shaped sine wave output with the frequency being proportional to 1/RC and therefore, a wider frequency range is possible when using a variable capacitor. However, RC Oscillators are restricted to frequency applications because at high frequency the reactance offered by the capacitor is very low so it acts as a short circuit.

Why it uses 3 RC stages?

Number of RC stages help improve the frequency stability. The total phase shift introduced by the feedback network is 180 degrees, if we are using N RC stages each RC section provide 180/N degree phase shift. sections cascaded the phase change rate is high so there is improved frequency stability. However for 4 RC sections there is an good phase change rate resulting in the most stable oscillator configuration. But 4 RC sections increases cost and makes circuit complexity.

1. When 2 RC sections are cascaded, the frequency stability is low. For 3

Hence phase shift oscillators make use of 3 RC sections in which each section provides a phase shift of 60 degree. The latter is generally used in high precision applications where cost is not much regarded and only accuracy plays a major role.

Procedure: 1. The circuit is constructed as per the given circuit diagram. 2. Switch ON the power supply and observe the output on the CRO (Sine wave oscillation). 3. Note down the practical frwquency and compare with the theoretical frequency. Result: Thus the RC phase shift oscillator was designed and the output waveform was obtained. Practical frequency fo=______Hz.

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Ex. No. 4 Date:

Verification and Study of Logic Gates

Aim: To study the various logic gates and verify its truth table. Apparatus Required:

S.NO 1. 2. 3. 4. 5. 6. 7. 8. 9. Theory:

APPARATUS Digital trainer kit IC 7408 [AND] IC 7432 [OR] IC 7404 [NOT] IC 7400 [NAND] IC 7402 [ NOR] IC 7486 [XOR IC 74266[XNOR] Connecting Wires

QUANTITY 1 1 1 1 1 1 1 1 1

Logic gates are the basic components in digital electronics. They are used to create digital circuits and even complex integrated circuits. For example, complex integrated circuits may bring already a complete circuit ready to be used microprocessors and microcontrollers are the best example but inside them they were projected using several logic gates. A gate is a digital electronic circuit having only one output but one or more inputs. The output or a signal will appear at the output of the gate only for certain input-signal combinations. There are many types of logic gates; such as AND, OR and NOT, which are usually called the three basic gates. Other popular gates are the NAND and the NOR gates; which are simply combinations of an AND or an OR gate with a NOT gate inserted just before the output signal. Other gates include the XOR Exclusive-OR and the XNOR "Exclusive NOR" gates. All the logic gates used in the exercises below are known as TTL (transistor-to-transistor) logic. These have the convenient property that the output of any gate can be used directly as input to another gate. All these TTL circuits are operated from a 5 V power supply, and the binary digits 0 and 1 are represented by low and high voltages on the gate terminals.

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AND: The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is used to show the AND operation i.e. A.B. Bear in mind that this dot is sometimes omitted i.e. AB OR: The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are high. A plus (+) is used to show the OR operation. NOT: The NOT gate is an electronic circuit that produces an inverted version of the input at its output. It is also known as an inverter. If the input variable is A, the inverted output is known as NOT A. This is also shown as A', or A with a bar over the top, as shown at the outputs. NAND: This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small circle on the output. The small circle represents inversion. NOR: This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle on the output. The small circle represents inversion. XOR: The 'Exclusive-OR' or EOR or XOR gate is a circuit which will give a high output if either, but not both, of its two inputs are high. An encircled plus sign ( ) is used to + show the EOR operation. XNOR: The 'Exclusive-NOR' gate circuit does the opposite to the EOR gate. It will give a low output if either, but not both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. The small circle represents inversion.

IC Pin Diagram, Logic Diagram and Truth Table: 1. AND gate:

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2. OR gate:

3. NOT Gate:

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4. NAND gate:

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5. NOR gate:

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6. XOR gate:

7. XNOR gate:

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Procedure: Implementing the Solution 1. Plug the chips you will be using into the breadboard. Point all the chips in the same direction with pin 1 at the upper-left corner. (Pin 1 is often identified by a dot or a notch next to it on the chip package). 2. Connect +5V and GND pins of each chip to the power and ground bus strips on the breadboard. 3. Make the connections as per the circuit diagram. 4. Switch on VCC and apply various combinations of input according to truth table.

RESULT: Thus, the logic gates are studied and its truth tables are verified.
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Ex. No. 5 Date:

Design of Half Adder and Full Adder Using Logic Gates

Aim: To implement half-adder and full adder circuits. Apparatus Required: IC 7486, IC 7432, IC 7408, IC 7400, Digital Trainer Kit, Connecting wires, etc. Logic Circuit Diagram:

Theory: HALF ADDER A half adder has two inputs for the two bits to be added and two outputs one from the sum S and other from the carry c into the higher adder position. Above circuit is called as a carry signal from the addition of the less significant bits sum from the X-OR Gate the carry out from the AND gate. FULL ADDER: A full adder is a combinational circuit that forms the arithmetic sum of input; it consists of three inputs and two outputs. A full adder is useful to add three bits at a time but a

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half adder cannot do so. In full adder sum output will be taken from X-OR Gate, carry output will be taken from OR Gate. PROCEDURE: 1. Plug the chips you will be using into the breadboard. Point all the chips in the same direction with pin 1 at the upper-left corner. (Pin 1 is often identified by a dot or a notch next to it on the chip package). 2. Connect +5V and GND pins of each chip to the power and ground bus strips on the breadboard. 3. Make the connections as per the circuit diagram. 4. Switch on VCC and apply various combinations of input according to truth table. 5. Note down the output readings for half/full adder and sum and the carry bit for different combinations of inputs in following Tables where S & V indicating logic value of the output. And fill your result in S (V) and C (V) in voltage. Where 5V indicating logic 1 and 0V indicating logic 0. Truth Table:

Observation:

Result:

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Ex. No. 6 Date:

Study and Construction of Flip- Flops Using Logic Gates

Aim: To construct the various flipflops using logic gates. Apparatus Required: Digital Trainer Kit, IC 7400, IC 7410, IC 7404, Connecting Wires.. Theory: RS and D Flip-Flop:S Flip flop has two data inputs R & S. application. inadvertently. lop a circuit that needs only a single data input. - Flop using NOR Gate. output Q is in the truth table. J-K Flip-flop:-Flop is the most versatile binary strange element. -flop. The uncertainty in the State of SR Flip- Flop when S = R = 1 can be eliminated by using JK Flip-Flop T Flip Flop:-

obtained by using NAND or NOR gates. ) and two outputs Q and Q.

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stable state Q=1 which is referred to as the 1 state( or set state ) whereas in the other stable state Q=0 which is referred to as the 0 state ( or reset state ) it is in 0 state, it continues to remain in this state. bit of digital information. as shown in fig. table 1. If T=1 it acts as a toggle switch for every clock pulse the output Q changes. Procedure:1. Study the circuit diagram. 2. Connect the circuit as shown in fig i.e. JK Flip Flop by using connecting wires. 3. Switch ON the power supply. 4. Apply proper I/P to J & K I/Ps of Flip-Flop from Logic I/P 5. Check the O/P on Logic O/P Section. 6. Change the I/P & Verify the Truth Table.

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Logic Diagram and Truth Table: SR Flipflop:

D Flipflop:

JK Flipflop:

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T FlipFlop:

Result:

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CYCLE II MICROPROCESSOR EXPERIMENTS

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Ex No. 7(a) Date: __/__/2012

8-bit Addition and Subtraction Using 8085 Microprocessor

AIM: To perform the addition and subtraction of two 8-bit data (a) without carry/borrow and (b) with carry/borrow using 8085 Microprocessor. EQUIPMENTS REQUIRED: 8085 Microprocessor kit, keyboard (optional), power supply unit 1 each. ALGORITHM: ADDITION OF TWO 8-BIT DATA WITHOUT CARRY: Step 1: Start the program. Step 2: Initialize the address of the memory register as a 16-bit data. Step 3: Get the first data in the first location and the second data in the second location. Step 4: Move the first data to the accumulator. Step 5: Go to the second location and add the second data with the first data. Step 6: Move the result stored in the accumulator in the next memory location. Step 7: Terminate the program. ADDITION OF TWO 8-BIT DATA WITH CARRY: Step 1: Start the program. Step 2: Initialize the address of the memory register of HL register pair as a 16bit data. Step 3: Get the first data in the first location and the second data in the second location. Step 4: Move the first data to the accumulator. Initialize any general purpose register (say C register) to zero. Step 5: Perform addition between the two 8-bit data. Step 6: Store the result in any address location (say 4152H).

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Step 7: Check for the carry flag. If CY=1, then increment the data in the general purpose register else keep the content as such. Step 8: Store the data in the general purpose register to any memory location (say 4153H). Step 9: Stop the program. SUBTRACTION OF TWO 8-BIT DATA WITHOUT BORROW: Step 1: Start the program. Step 2: Initialize the address of the memory. Step 3: Get the first data in the first location and the second data in the second location. Step 4: Move the first data to the accumulator. Step 5: Go to the second location and formulate the subtraction operation. Step 6: Move the result stored in the accumulator in the next memory location. Step 7: Terminate the program. SUBTRACTION OF TWO 8-BIT DATA WITH BORROW: Step 1: Start the program. Step 2: Initialize the address of the memory register of HL register pair as a 16bit data. Step 3: Get the first data in the first location and the second data in the second location. Step 4: Move the first data to the accumulator. Initialize any general purpose register (say C register) to zero. Step 5: Perform subtraction between the two 8-bit data, move the difference in the Accumulator. Step 6: Store the result in any address location (say 4152H). Step 7: Check for the carry flag. If CY=0, then keep the content as such. Step 8: If CY=1, then increment the data in the general purpose register, take 1s Complement to the data in the accumulator and add 01 to it.
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Step 9: Store the data in the general purpose register to any memory location (say 4153H). Step 10: Stop the program.

PROGRAM: ADDITION OF TWO 8-BIT DATA WITHOUT CARRY: Memory Address 4100 4101 4102 4103 4104 4105 4106 MOV A, M INX H MOV B, M ADD B Move the Accumulator first data to Label Mnemonics LXI H, 4150 Opcode Comments Load the HL register pair of the contents of the address 4150H

HL register points to 4151H Move the second data to B register Perform Addition between A & B [A+B A] and store the sum in Accumulator. Store the results in the address 4152H from the accumulator.

4107 4108 4109 410A

STA 4152

HLT

Stop the Program

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OBSERVATION: INPUT ADDRESS 4150 4151 INPUT DATA 03 06 4152 OUTPUT ADDRESS OUTPUT DATA

ADDITION OF TWO 8-BIT DATA WITH CARRY: Memory Address 4100 Label Mnemonics LXI H,4150 Opcode Comments Load the HL register pair of the content to the address 4150H. Move the first Accumulator. data to

4103 4104 4105 4106 4107 4108

MOV A, M INX H MOV B, M MVI C, 00 ADD B JNC 410C Loop

HL register points to 4151H Move the second data to B register Initialize C register to zero Perform addition between A & B register [A+B A] Check for carry flag, if CY=0, go to 410C else go to 410B Increment C register Store the result in 4152H Move the content of C to Accumulator Stores the data in A at 4153H Stop the Program

410B 410C 410F 4110 4113 Loop

INR C STA 4152 MOV A, C STA 4153 HLT

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OBSERVATION: INPUT ADDRESS 4150 4151 INPUT DATA FF 06 OUTPUT ADDRESS 4152 4153 OUTPUT DATA

SUBTRACTION OF TWO 8-BIT DATA WITHOUT BORROW: Memory Address 4100 Label Mnemonics LXI H,4150 Opcode Comments Load the HL register pair of the contents to the address 4150H. Move the first Accumulator. data to

4103 4104 4105 4106

MOV A, M INX H MOV B, M SUB B

HL register pair points to 4151 Move Second data to B register. Perform Subtraction between A and B [A-B A] and store the difference in Accumulator. Store the results in the address 4152H. Stop the Program.

4107 410A OBSERVATION: INPUT ADDRESS 4150 4151

STA 4152 HLT

INPUT DATA FF 06

OUTPUT ADDRESS 4152

OUTPUT DATA

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SUBTRACTION OF TWO 8-BIT DATA WITH BORROW: Memory Address 4100 4102 4105 4106 4107 4108 410B 410C 410D 410F 4110 4111 4112 4113 OBSERVATION: INPUT ADDRESS 4150 4151 INPUT DATA 06 FF OUTPUT ADDRESS 4152 4153 OUTPUT DATA Label Mnemonics Operand Opcode Comments

MVI LXI MOV INX SUB JNC INR CMA ADI INX MOV INX MOV HLT

C, 00 H, 4500 A, M H M L1 C

Clear C reg. Initialize HL reg. to 4500 Transfer first data to accumulator Increment HL reg. to point next memory location. Subtract first number from acc. Content. Jump to location if result does not yield borrow. Increment C reg. Complement the Acc. content Add 01H to content of acc. Increment HL reg. to point next memory location. Transfer the result from acc. to memory. Increment HL reg. To point next memory location. Move carry to memory. Stop the program

01H H M, A H M, C

Result:
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Ex No. 7(b) Date: __/__/2012

8-bit Multiplication and Division Using 8085 Microprocessor

AIM:
1.

To multiply two 8 bit numbers stored at consecutive memory locations and store the result in memory. To divide two 8-bit numbers and store the result in memory.

2.

ALGORITHM: 1. Multiplication: LOGIC: Multiplication can be done by repeated addition. 1. Initialize memory pointer to data location. 2. Move multiplicand to a register. 3. Move the multiplier to another register. 4. Clear the accumulator. 5. Add multiplicand to accumulator 6. Decrement multiplier 7. Repeat step 5 till multiplier comes to zero. 8. The result, which is in the accumulator, is stored in a memory location. 2.Division: LOGIC: Division is done using the method Repeated subtraction. 1. Load Divisor and Dividend 2. Subtract divisor from dividend 3. Count the number of times of subtraction which equals the quotient 4. Stop subtraction when the dividend is less than the divisor .The dividend now becomes the remainder. Otherwise go to step 2. 5. Stop the program execution.

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Program:
1. Multiplication:

Memory Label Address

Mnemonics

Operand

Opcode

Comments

4100

LXI

H, 4500

Load HL register with data in memory location 4500

4101 4102 Transfer first data to register B. 4103 4104 4105 4106 4107 MVI C, 00H Clear C register for carry. MOV INX MVI B, M H A, 00H Increment HL reg. to point next memory location. Clear the accumulator.

4108 4109 L1 ADD M Add data in memory location with accumulator. Jump to NEXT if there is no carry.

410A 410B 410C 410D 410E NEXT

JNC

NEXT

INR DCR

C B

Increment C register. Decrement B register.

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Prepared by J.Cyril Robinson Azariah & C.Moorthy

410F 4110 4111 4112 4113 4114 4115 4116

JNZ

L1

Jump to L1 if B is not zero.

INX MOV INX MOV HLT

H M, A H M, C

Increment HL register to point next memory location. Transfer the result from acc. to memory. Increment HL register. Transfer the result from C reg. to memory. Stop the program

2. Division:

ADDRES S

OPCOD E

LABEL

MNEMONIC S

OPERAN D

COMMENTS

4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D LOOP

MVI LXI

B,00 H,4500

Clear B register for quotient Initialize HL register to 4500H Transfer dividend to accumulator. Increment HL register to point next memory location. Subtract divisor from dividend Increment B register. Jump to LOOP if result does not yield borrow Add divisor to acc. Decrement B reg.
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MOV INX SUB INR JNC

A,M H M B LOOP

ADD DCR

M B

Prepared by J.Cyril Robinson Azariah & C.Moorthy

410E 410F 4110 4111 4112

OBSERVATION: INPUT 4500 4501 RESULT:

INX MOV INX MOV HLT

H M,A H M,B

Increment HL reg to point next memory location. Transfer the remainder from acc. to memory. Increment HL reg to point next memory location. Transfer the quotient from B reg to memory. Stop the program

OUTPUT 4502 4503

Thus the 8-bit multiplication and 8-bit division was done in 8085p.

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Ex No. 8 Finding Smallest Number and largest Number from the Array of Date: __/__/2012 Numbers Using 8085 Microprocessor AIM: i) To find the largest element in an array. ii) To find the smallest element in an array. Using 8085 Microprocessor ALGORITHM: a) the largest element in an array 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter elements in an array. 4. Decrement the counter by 1. (register) with the total number of

5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element). 7. If the accumulator content is smaller, then move the memory content (largest element) to the accumulator. Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero. 10. Store the result (accumulator content) in the specified memory location. b) To find the smallest element in an array. 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter (register) with the total elements in an array. 4. Decrement the counter by 1. 5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element). 7. If the accumulator content is smaller, then move the memory content (largest element) to the accumulator. Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero 10. Store the result (accumulator content) in the specified memory location.
Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 43

number

of

Program:
1.

Largest Number: OPCODE LABEL MNEMONICS OPERAN D

ADDRESS

COMMENTS

8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 LOOP LOOP1

LXI

H,8100

Initialize HL reg to 8100H Initialize B reg with no. of comparisons(n1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is greater than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location. Stop the program

MVI

B,04

MOV INX CMP JNC

A,M H M LOOP

MOV DCR JNZ

A,M B LOOP1

STA

8105

HLT

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2) Smallest Number: ADDRESS 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 LOOP LOOP1 OPCODE LABEL MNEMONICS LXI OPERAND H,8100 COMMENTS Initialize HL reg to 8100H Initialize B reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is lesser than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location. Stop the program

MVI MOV INX CMP JC

B,04 A,M H M LOOP

MOV DCR JNZ

A,M B LOOP1

STA

8105

HLT

OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 RESULT:

OUTPUT ADDRESS DATA 8105

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Ex No. 9 Date: __/__/2012

Sorting an Array of Numbers in Ascending and Descending Order Using 8085 Microprocessor

Aim: To sort the given number in the ascending and descending order using 8085 microprocessor. Algorithm:
1.

Ascending Order: 1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is larger than second then interchange the number. 3. If the first number is smaller, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order

2. Descending Order:

1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is smaller than second then interchange the number. 3. If the first number is larger, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order Program: Ascending Order:

1.

ADDRESS

OPCODE

LABEL

MNEMONICS

OPERAND

COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg to 8100H Initialize C reg with no. of comparisons(n-1)
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8000 8001 8002 8003 8004 8005 8006 LOOP 3

MVI

B,04

LXI

H,8100

MVI

C,04

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8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A
2. Descending Order:

LOOP2

MOV INX CMP JC

A,M H M LOOP1

Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is less than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program

MOV MOV DCX MOV LOOP1 INX DCR JNZ

D,M M,A H M,D H C LOOP2

DCR JNZ

B LOOP3

HLT

ADDRESS 8000 8001 8002 8003 8004 8005

OPCODE

LABEL

MNEMONICS MVI

OPERAND B,04

COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg. to8100H Initialize C reg with no.
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LOOP 3

LXI

H,8100

MVI

C,04

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8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A OBSERVATION: Ascending: INPUT MEMORY LOCATION

LOOP2

MOV INX CMP JNC

A,M H M LOOP1

of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is greater than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program

MOV MOV DCX MOV INX DCR JNZ

D,M M,A H M,D H C LOOP2

LOOP1

DCR JNZ

B LOOP3

HLT

OUTPUT DATA MEMORY LOCATION DATA

8100 8101 8102 8103 8104

Prepared by J.Cyril Robinson Azariah & C.Moorthy

8100 8101 8102 8103 8104

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Descending: INPUT MEMORY LOCATION DATA MEMORY LOCATION OUTPUT DATA

8100 8101 8102 8103 8104

8100 8101 8102 8103 8104

Result:

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Ex No. 10 Date: __/__/2012

Transferring Block of Data Using 8085 Microprocessor

AIM: To transfer a block of data from one block to another block using 8085 microprocessor. ALGORITHM: 1. Get the numbers to be transferred from the memorylocations. 2. Initialize the counter value. 3. Initialize the D register with the destination address 4. Increment the H and D register and Decrement the counter. 5. If counter value is not zero then move to loop 1, until counter becomes zero. 6. Store the result in the specified memory location. PROGRAM: ADDRESS 8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 810A 810B 810C 800D 800E 800F HLT OPCODE LABEL MNEMONICS LXI OPERAND H,8200 COMMENTS Initialize H reg with number of comparisons (n-1) Initialize C reg with no. of comparisons(n-1) Initialize D reg with no. of comparisons(n-1)

MVI LXI

C,05 D,8300

LOOP1

MOV INX INX DCR JNZ

D,M H D C LOOP1

If A is less than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Stop the program
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Prepared by J.Cyril Robinson Azariah & C.Moorthy

OBSERVATION: INPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA

OUTPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA

RESULT: Thus the transferring a block of data from one block to another block program is executed and thus the datas are transferred from one block to another block.

Prepared by J.Cyril Robinson Azariah & C.Moorthy

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Ex No. 11 Date: __/__/2012 Aim:

STEPPER MOTOR INTERFACING WITH 8085

The aim of the experiment is to demonstrate the forward/reverse stepped motions of a stepper motor, using 8085 microprocessor. Apparatus Required: 8085 Microprocessor kit, Interfacing card, Stepper Motor, Power supply unit Algorithm: 1. Enter the program starting from the location 8100. 2. Execute the same. 3. The stepper motor rotates. 4. Speed can be varied by varying the count at DE pair. 5. Direction can be varied by entering the data in the look up table in the reverse order.

DESCRIPTION: The stepper motors have immense applications in printing, Industrial Robotics, Precision tool motions in drilling, cutting and shaping machines, lathe etc. This project is proposed to demonstrate interfacing of stepper motor to 8085 microprocessor and to run it in continuous or stepped motion in forward or reverse direction under program control, using 8085 microprocessor. HARDWARE DESCRIPTION: The hardware setup consists of a microprocessor motherboard and stepper motor interface board. The motherboard consists of 8085 MPU, 8KB EPROM, 8KB RAM, Keyboard and display controller 8279, 21-key Hex-keypad and six numbers of seven segment LEDs and Bus Expansion connector. The stepper motor interface consists of driver transistors for stepper motor windings and address decoding circuit. The microprocessor output the binary sequence through data bus, which are converted to current pulses by the driver transistors and used to drive stepper motor. The software for the system is developed in 8085 assembly language.

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Address/ AD0-AD7 LATCH 8085 D0-D7 CPU A0-A7 EPROM System bus 8KB 50 Pin Expansion Connector Control Address/ CS Decoder Connector D0-D3 Stepper driver Transistor driver

Latches

RAM 8KB

8279 Keyboard Keyboard Display F int D E Display

Buffer

LED indication for output binary sequence

C 8 4 0

9 5 1

A 6 2

B 7 3

Go Nxt Sub

Fig1. Block diagram of stepper motor interface

PROGRAM:

ADDRESS 8100 8102 8103 8104 8105 8106

OPCODE

LABEL START

MNEMONICS LXI

OPERAND H, LOOK UP B, 04 A,M 0C0H

COMMENTS Initialize H reg look up table. Initialize HL reg to 8100H Initialize C reg with no. of comparisons(n1)

MVI REPT MOV OUT

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8108

LXI

D, 0303H

Increment HL reg. to point next memory location

810B 810C 810D

DELAY

NOP DCX MOV

D A,E Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Decrement C reg If C is not zero go to loop2 If B is not Zero go to loop3 Stop the program

810E 810F 8112 8113 8114 8117 8118 8119 811A LOOK UP

ORA JNZ INX DEC JNZ JMP

D DELAY H B REPT START

DB 09 05

06 0A

RESULT: Thus the stepper motor program is executed.

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APPENDIX A 8085 OPCODE SHEET

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APPENDIX B VIVA QUESTIONS: Electronics:

1. Give the value of Charge, Mass of an electron. Charge of an electron 1.6 x 10 -19 coloumbs & Mass of an electron - 9.11 x 10 -31 Kgs 2. Define Potential. A potential of V volts at point B with respect to point A, is defined as the work done in taking unit positive charge from A to B , against the electric field. 3. Define Current density. It is defined as the current per unit area of the conducting medium. J = I / A 4. Define Electron volts. If an electron falls through a potential of one volt then its energy is 1 electron volt. 1 eV = 1.6 x 10 -19 joules 5. What is Electrostatic deflection sensitivity? Electrostatic deflection sensitivity of a pair of deflecting plates of a cathode ray oscilloscope ( CRO) is defined as the amount of deflection of electron spot produced when a voltage of 1 Volt DC is applied between the corresponding plates. 6. What is the relation for the maximum number of electrons in each shell? Ans: 2n2 7. What are valence electrons? Electron in the outermost shell of an atom is called valence electron. 8. What is forbidden energy gap? The space between the valence and conduction band is said to be forbidden energy gap. 9. What are conductors? Give examples? Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 56

Conductors are materials in which the valence and conduction band overlap each other so there is a swift movement of electrons which leads to conduction. Ex. Copper, silver. 10. What are insulators? Give examples? Insulators are materials in which the valence and conduction band are far away from each other. So no movement of free electrons and thus no conduction. Ex glass, plastic. 11. Give the energy band structure of Insulator. In Insulators there is a wide forbidden energy gap. So movement of valence electron from valence to conduction band is not possible. 12. Give the energy band structure of Semi conductor. In Semiconductors there is a small forbidden energy gap. So movement of valence electron from valence to conduction band is possible if the valence electrons are supplied with some energy. 13. Give the energy band structure of conductor. In conductors there is no forbidden energy gap, valence band and conduction and over lap each other. so there is a heavy movement of valence electrons. 14. what are Semiconductors? Give examples? The materials whose electrical property lies between those of conductors and insulators are known as Semiconductors. Ex germanium, silicon. 15. What are the types of Semiconductor? 1. Intrinsic semiconductor 2. Extrinsic semiconductor. 16. What is Intrinsic Semiconductor? Pure form of semiconductors are said to be intrinsic semiconductor. Ex: germanium, silicon. 17. Define Mass action law. Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 57

Under thermal equilibrium the product of free electron concentration (n) and hole concentration (p) is constant regardless of the individual magnitude. n.p = ni2 18. What is Extrinsic Semiconductor? If certain amount of impurity atom is added to intrinsic semiconductor the resulting semiconductor is Extrinsic or impure Semiconductor. 19. What are the types of Extrinsic Semiconductor? 1. P-type Semiconductor 2. N- Type Semiconductor. 20. What is P-type Semiconductor? The Semiconductor which are obtained by introducing pentavalent impurity atom (phosphorous, antimony) are known as P-type Semiconductor. 21. What is N-type Semiconductor? The Semiconductor which is obtained by introducing trivalent impurity atom (gallium, indium) are known as N-type Semiconductor. 22. What is doping? Process of adding impurity to a intrinsic semiconductor atom is doping. The impurity is called dopant. 23. Which charge carriers is majority and minority carrier in N-type Semiconductor? majority carrier: electron and minority carrier: holes. 24.which charge carriers is majority and minority carrier in P-type Semiconductor? Majority carrier: holes and minority carrier: electron 25. Why n - type or penta valent impurities are called as Donor impurities?

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n- type impurities will donate the excess negative charge carriers ( Electrons) and therefore they are reffered to as donor impurities. 26. Why P type or trivalent impurities are called as acceptor impurity? p- type impurities make available positive carriers because they create holes which can accept electron, so these impurities are said to be as acceptor impurity. 27. Give the relation for concentration of holes in the n- type material? pn = ni 2 /ND Where pn - concentration of holes in the n type semiconductor ND - concentration of donor atoms in the n type semiconductor 28. Give the relation for concentration of electrons in the p - type material? np = ni 2 /NA Where np - concentration of electrons in p- type semiconductor ND - concentration of acceptor atoms in the p type semiconductor 29. Define drift current? When an electric field is applied across the semiconductor, the holes move towards the negative terminal of the battery and electron move towards the positive terminal of the battery. This drift movement of charge carriers will result in a current termed as drift current. 30. Give the expression for drift current density due to electron. Jn = q n nE Where, Jn - drift current density due to electron q- Charge of electron Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 59

n - Mobility of electron E - applied electric field 31. Give the expression for drift current density due to holes. Jp = q p p E Where, Jn - drift current density due to holes q - Charge of holes p - Mobility of holes E - applied electric field 32. Define the term diffusion current? A concentration gradient exists, if the number of either electrons or holes is greater in one region of a semiconductor as compared to the rest of the region. The holes and electron tend to move from region of higher concentration to the region of lower concentration. This process in called diffusion and the current produced due this movement is diffusion current. 33. Define mean life time of a hole or and electron. The electron hole pair created due to thermal agitation woll disappear as a result of recombination. Thus an average time for which a hole or an electron exist before recombination can be said as the mean life time of a hole or electron. 34. What is the other name of continuity equation? What does it indicate? The other name of continuity equation is equation of conservation of charge. This equation indicates that the rate at which holes are generated thermally just equals the rate at which holes are lost because of recombination under equilibrium conditions. 35. Define Hall effect? If a metal or semiconductor carrying current I is placed in a transverse magnetic field B , an electric field E is induced in the direction perpendicular to both I and B This phenomenon is known as Hall effect. 36. Give some application of Hall Effect. i). Hall Effect can be used to measure the strength of a magnetic field in terms of electrical voltage. ii).It is used to determine whether the semiconductor is p type or n- type material iii).It is used to determine the carrier concentration iv).It is used to determine the mobility. Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 60

37. Define the term transition capacitance? When a PN junction is reverse biased, the depletion layer acts like a dielectric material while P and N type regions on either side which has low resistance act as the plates. In this way a reverse biased PN junction may be regarded as parallel plate capacitor and thus the capacitance across this set up is called as the transition capacitance. CT = Where CT - transition capacitance A - Cross section area of the junction W Width of the depletion region 38. What is a varactor diode? A diode which is based on the voltage variable capacitance of the reverse biased p-n junction is said to be varactor diode. It has other names such as varicaps, voltacaps. 39. Define the term diffusion capacitance. The diffusion capacitance of a forward biased diode is defined as the rate of change of injected charge with voltage. CD = I / VT Where, Cd time constant I current across the diode vT threshold voltage 40. what is recovery time? Give its types. When a diode has its state changed from one type of bias to other a transient accompanies the diode response, i.e., the diode reaches steady state only after an interval of time tr called as recovery time. The recovery time can be divided in to two types such as (i) forward recovery time (ii) reverse recovery time 41. What is meant by forward recovery time? A/W

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The forward recovery time may be defined as the time interval from the instant of 10% diode voltage to the instant this voltage reaches 90% of the final value. It is represented as t f r.

42. What is meant by reverse recovery time? The reverse recovery time can be defined as the time required for injected or the excess minority carrier density reduced to zero , when external voltage is suddenly reversed.

43. Define storage time. The interval time for the stored minority charge to become zero is called storage time. It is represented as t s.

44. Define transition time. The time when the diode has normally recovered and the diode reverse current reaches reverse saturaton current I0 is called as transition time. It is represented as t t

45. What are break down diodes? Diodes which are designed with adequate power dissipation capabilities to operate in the break down region are called as break down or zener diodes.

46. What is break down? What are its types? When the reverse voltage across the pn junction is increased rapidly at a voltage the junction breaks down leading to a current flow across the device. This phenomenon is called as break down and the voltage is break down voltage. The types of break down are i) zener break down ii)Avalanche breakdown

47. What is zener breakdown?

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Zener break down takes place when both sides of the junction are very heavily doped and Consequently the depletion layer is thin and consequently the depletion layer is tin. When a small value of reverse bias voltage is applied , a very strong electric field is set up across the thin depletion layer. This electric field is enough to break the covalent bonds. Now extremely large number of free charge carriers are produced which constitute the zener current. This process is known as zener break down. 48. What is avalanche break down? When bias is applied , thermally generated carriers which are already present in the diode acquire sufficient energy from the applied potential to produce new carriers by removing valence electron from their bonds. These newly generated additional carriers acquire more energy from the potential and they strike the lattice and create more number of free electrons and holes. This process goes on as long as bias is increased and the number of free carriers get multiplied. This process is termed as avalanche multiplication. Thus the break down which occur in the junction resulting in heavy flow of current is termed as avalanche break down. 49. How does the avalanche breakdown voltage vary with temperature? In lightly doped diode an increase in temperature increases the probability of collision of electrons and thus increases the depletion width. Thus the electrons and holes needs a high voltage to cross the junction. Thus the avalanche voltage is increased with increased temperature. 50. How does the zener breakdown voltage vary with temperature? In heavily doped diodes, an increase in temperature increases the energies of valence electrons, and hence makes it easier for these electrons to escape from covalent bonds. Thus less voltage is sufficient to knock or pull these electrons from their position in the crystal and convert them in to conduction electrons. Thus zener break down voltage decreases with temperature. 51. What is a transistor (BJT)? Transistor is a three terminal device whose output current, voltage and /or power is controlled by input current. 52. What are the terminals present in a transistor? Three terminals: emitter, base, collector. 53. What is FET? FET is abbreviated for field effect transistor. It is a three terminal device with its output characteristics controlled by input voltage. Prepared by J.Cyril Robinson Azariah & C.Moorthy Page 63

54. Why FET is called voltage controlled device? The output characteristics of FET is controlled by its input voltage thus it is voltage controlled. 55. What are the two main types of FET? 1. JFET 2. MOSFET.

8085 Microprocessor:
1. What is Microprocessor? Give the power supply & clock frequency of 8085?

Ans:A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device called memory accepts binary data as input and processes data according to those instructions and provides result as output. The power supply of 8085 is +5V and clock frequency in 3MHz.

2. List few applications of microprocessor-based system.

Ans: It is used:

i. For measurements, display and control of current, voltage, temperature, pressure, etc. ii. For traffic control and industrial tool control. iii. For speed control of machines.

3. What are the functions of an accumulator?

Ans:The accumulator is the register associated with the ALU operations and sometimes I/O operations. It is an integral part of ALU. It holds one of data to be processed by ALU. It also temporarily stores the result of the operation performed by the ALU.

4. List the 16 bit registers of 8085 microprocessor.

Ans:Stack pointer (SP) and Program counter (PC).

5. List the allowed register pairs of 8085.

Ans:

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B-C register pair D-E register pair H-L register pair

11. List out the five categories of the 8085 instructions. Give examples of the instructions for each group.

Ans:

Data transfer group MOV, MVI, LXI. Arithmetic group ADD, SUB, INR. Logical group ANA, XRA, CMP. Branch group JMP, JNZ, CALL. Stack I/O and Machine control group PUSH, POP, IN, HLT.

12. Explain the difference between a JMP instruction and CALL instruction.

Ans: A JMP instruction permanently changes the program counter. A CALL instruction leaves information on the stack so that the original program execution sequence can be resumed.

13. Explain the purpose of the I/O instructions IN and OUT.

Ans: The IN instruction is used to move data from an I/O port into the accumulator. The OUT instruction is used to move data from the accumulator to an I/O port. The IN & OUT instructions are used only on microprocessor, which use a separate address space for interfacing.

14. What is the difference between the shift and rotate instructions?

Ans: A rotate instruction is a closed loop instruction. That is, the data moved out at one end is put back in at the other end. Th e shift instruction loses the data that is moved out of the last bit locations.

15. How many address lines in a 4096 x 8 EPROM CHIP?

Ans: 12 address lines.

16. What are the Control signals used for DMA operation?

Ans:-HOLD & HLDA.

17. What is meant by Wait State?

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Ans:-This state is used by slow peripheral devices. The peripheral devices can transfer the data to or from the microprocessor by using READY input line. The microprocessor remains in wait state as long as READY line is low. During the wait state, the contents of the address, address/data and control buses are held constant.

18. List the four instructions which control the interrupt structure of the 8085 microprocessor.

Ans:-

DI ( Disable Interrupts ) EI ( Enable Interrupts ) RIM ( Read Interrupt Masks ) SIM ( Set Interrupt Masks )

19. What is meant by polling?

Ans:-Polling or device polling is a process which identifies the device that has interrupted the microprocessor.

20. What is meant by interrupt?

Ans:-Interrupt is an external signal that causes a microprocessor to jump to a specific subroutine.

21. Explain priority interrupts of 8085.

Ans:-The 8085 microprocessor has five interrupt inputs. They are TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. These interrupts have a fixed priority of interrupt service. If two or more interrupts go high at the same time, the 8085 will service them on priority basis. The TRAP has the highest priority followed by RST 7.5, RST 6.5, RST 5.5. The priority of interrupts in 8085 is shown i n the table.

TRAP RST 7.5 RST 6.5 RST 5.5 INTR

1 2 3 4 5

22. What is a microcomputer?

Ans:-A computer that is designed using a microprocessor as its CPU is called microcomputer.

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23. What is the signal classification of 8085

Ans:-All the signals of 8085 can be classified into 6 groups

Address bus Data bus Control and status signals Power supply and frequency signals Externally initiated signals Serial I/O ports

24. What are operations performed on data in 8085

Ans:- The various operations performed are

Store 8-bit data Perform arithmetic and logical operations Test for conditions Sequence the execution of instructions Store data temporarily during execution in the defined R/W memory locations called the stack

25. Steps involved to fetch a byte in 8085

Ans:-

i. The PC places the 16-bit memory address on the address bus ii. The control unit sends the control signal RD to enable the memory chip iii. The byte from the memory location is placed on the data bus iv. The byte is placed in the instruction decoder of the microprocessor and the task is carried out according to the instruction

26. How many interrupts does 8085 have, mention them

Ans:-The 8085 has 5 interrupt signals; they are INTR, RST7.5, RST6.5, RST5.5 and TRAP

27. Basic concepts in memory interfacing

Ans:-The primary function of memory interfacing is that the microprocessor should be able to read from and write into a given register of a memory chip. To perform these operations the microprocessor should

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Be able to select the chip Identify the register Enable the appropriate buffer

28. Define instruction cycle, machine cycle and T-state

Ans:-Instruction cycle is defined, as the time required completing the execution of an instruction. Machine cycle is defined as th e time required completing one operation of accessing memory, I/O or acknowledging an external request. Tcycle is defined as one subdivision of the operation performed in one clock period

29. What is an instruction?

Ans:-An instruction is a binary pattern entered through an input device to command the microprocessor to perform that specific function

30. What is the use of ALE

Ans:-The ALE is used to latch the lower order address so that it can be available in T2 and T3 and used for identifying the memory address. During T1 the ALE goes high, the latch is transparent ie, the output changes according to the input data, so the output of the latch is the lower order address. When ALE goes low the lower order address is latched until the next ALE.

31. How many machine cycles does 8085 have, mention them

Ans:The 8085 have seven machine cycles. They are

Opcode fetch Memory read Memory write I/O read I/O write Interrupt acknowledge Bus idle

32. Explain the signals HOLD, READY and SID

Ans:HOLD indicates that a peripheral such as DMA controller is requesting the use of address bus, data bus and control bus. READY is used to delay the microprocessor read or write cycles until a slow responding peripheral is ready to send or accept data.SID is used to accept serial data bit by bit

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33. Mention the categories of instruction and give two examples for each category.

Ans:The instructions of 8085 can be categorized into the following five categories

Data transfer Instructions Arithmetic Instructions Logical Instructions Branching Instructions

-MOV Rd,Rs STA 16-bit -ADD R DCR M -XRI 8-bit RAR -JNZ CALL 16-bit

Machine control Instructions -HLT NOP

34. Explain LDA, STA and DAA instructions

Ans:LDA copies the data byte into accumulator from the memory location specified by the 16-bit address. STA copies the data byte from the accumulator in the memory location specified by 16-bit address. DAA changes the contents of the accumulator from binary to 4-bit BCD digits.

35. Explain the different instruction formats with examples

Ans:The instruction set is grouped into the following formats

One byte instruction Two byte instruction

-MOV C,A -MVI A,39H

Three byte instruction -JMP 2345H

36. What is the use of addressing modes, mention the different types

Ans:The various formats of specifying the operands are called addressing modes, it is used to access the operands or data. The different types are as follows

Immediate addressing Register addressing Direct addressing Indirect addressing Implicit addressing

37. What is the use of bi-directional buffers?

Ans:It is used to increase the driving capacity of the data bus. The data bus of a microcomputer system is bi-directional, so it requires a buffer that allows the data to flow in both directions.

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38. Give the register organization of 8085

Ans:

W(8) Z(8) B(8) C(8) D(8) E(8) H(8) L(8) Stack Pointer Program Counter

Temp. Reg Temp. Reg Register Register Register Register Register Register (16) (16)

39. Define stack and explain stack related instructions

Ans:The stack is a group of memory locations in the R/W memory that is used for the temporary storage of binary information during the execution of the program. The stack related instructions are PUSH & POP

40. Why do we use XRA A instruction

Ans:The XRA A instruction is used to clear the contents of the Accumulator and store the value 00H.

41. Compare CALL and PUSH instructions

Ans:

CALL 1.When CALL is executed the microprocessor automatically stores the 16-bit address of the instruction next to CALL on the stack.

PUSH 1.PUSH The programmer uses the instruction to save the contents of the register pair on the stack

2. When PUSH is executed

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2.When CALL is executed the stack pointer is decremented by two

the stack pointer is decremented by two

42. What is Microcontroller and Microcomputer

Ans:Microcontroller is a device that includes microprocessor; memory and I/O signal lines on a single chip, fabricated using VLSI technology. Microcomputer is a computer that is designed using microprocessor as its CPU. It includes microprocessor, memory and I/O.

43. Define Flags

Ans:The flags are used to reflect the data conditions in the accumulator. The 8085 flags are S-Sign flag, Z-Zero flag, AC-Auxiliary carry flag, P-Parity flag, CYCarry flag, D7 D6 D5 D4 D3 D2 D1 D0

44. How does the microprocessor differentiate between data and instruction?

Ans:When the first m/c code of an instruction is fetched and decoded in the instruction register, the microprocessor recognizes the number of bytes required to fetch the entire instruction. For example MVI A, Data, the second byte is always considered as data. If the data byte is omitted by mistake whatever is in that memory location will be considered as data & the byte after the data will be treated as the next instruction.

45. Compare RET and POP

Ans:

RET 1.RET transfers the contents of the top two locations of the stack to the PC

POP 1.POP transfers the contents of the top two locations of the stack to the specified register pair

2.When RET is executed the SP is incremented by two

2. When POP is executed the SP is incremented by two

3.Has 8 conditional RETURN instructions

3.No conditional POP instructions

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46. What is assembler?

Ans:The assembler translates the assembly language program text which is given as input to the assembler to their binary equivalents known as object code. The time required to translate the assembly code to object code is called access time. The assembler checks for syntax errors & displays them before giving the object code.

47. What is loader?

Ans:The loader copies the program into the computers main memory at load time and begins the program execution at execution time.

48. What is linker?

Ans:A linker is a program used to join together several object files into one large object file. For large programs it is more ef ficient to divide the large program modules into smaller modules. Each module is individually written, tested & debugged. When all the modules work they are linked together to form a large functioning program.

49. What is interrupt service routine?

Ans:Interrupt means to break the sequence of operation. While the CPU is executing a program an interrupt breaks the normal sequence of execution of instructions & diverts its execution to some other program. This program to which the control is tra nsferred is called the interrupt service routine. 50.What are the various programmed data transfer methods?

Ans:

i) Synchronous data transfer

ii) Asynchronous data transfer iii) Interrupt driven data transfer

56. What are the signals used in input control signal & output control signal?

Ans: Input control signal

STB (Strobe input) IBF (Input buffer full) INTR(Interrupt request)

Output control signal

OBF (Output buffer full)

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ACK (Acknowledge input) INTR(Interrupt request)

57. What are the features used mode 2 in 8255?

Ans:The single 8-bit port in-group A is available.

1. The 8-bit port is bi-directional and additionally a 5-bit control port is available. 2. Three I/O lines are available at port C, viz PC2-PC0. 3. Inputs and outputs are both latched. 4. The 5-bit control port C (PC3=PC7) is used for generating/accepting handshake signals for the 8-bit data transfer on port A.

58. What are the modes of operations used in 8253?

Ans:Each of the three counters of 8253 can be operated in one of the following six modes of operation.

1. Mode 0 (Interrupt on terminal count) 2. Mode 1 (Programmable monoshot) 3. Mode 2 (Rate generator) 4. Mode 3 (Square wave generator) 5. Mode 4 (Software triggered strobe) 6. Mode 5 (Hardware triggered strobe)

59. What are the different types of write operations used in 8253?

Ans:There are two types of write operations in 8253

(1) Writing a control word register (2) Writing a count value into a count register

The control word register accepts data from the data buffer and initializes the counters, as required. The control word register contents are used for

(a) Initializing the operating modes (mode 0-mode4) (b) Selection of counters (counter 0- counter 2) (c) Choosing binary /BCD counters (d) Loading of the counter registers.

The mode control register is a write only register and the CPU cannot read its contents.

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60. Give the different types of command words used in 8259a?

Ans:The command words of 8259A are classified in two groups

1. Initialization command words (ICWs) 2. Operation command words (OCWs)

61. Give the operating modes of 8259a?

Ans:

(a) Fully Nested Mode (b) End of Interrupt (EOI) (c) Automatic Rotation (d) Automatic EOI Mode (e) Specific Rotation (f) Special Mask Mode (g) Edge and level Triggered Mode (h) Reading 8259 Status (i) Poll command (j) Special Fully Nested Mode (k) Buffered mode (l) Cascade mode

62. Define scan counter?

Ans: The scan counter has two modes to scan the key matrix and refresh the display. In the encoded mode, the counter provides binary count that is to be externally decoded to provide the scan lines for keyboard and display. In the decoded scan mode, the counter internally decodes the least significant 2 bits and provides a decoded 1 out of 4 scan on SL0-SL3.The keyboard and display both are in the same mode at a time.

63. What is the output modes used in 8279?

Ans: 8279 provides two output modes for selecting the display options.

1.Display Scan

In this mode, 8279 provides 8 or 16 character-multiplexed displays those can be organized as dual 4-bit or single 8-bit display units.

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2.Display Entry

8279 allows options for data entry on the displays. The display data is entered for display from the right side or from the left side.

64. What are the modes used in keyboard modes?

Ans: 1. Scanned Keyboard mode with 2 Key Lockout. 2. Scanned Keyboard with N-key Rollover. 3. Scanned Keyboard special Error Mode. 4. Sensor Matrix Mode.

65. What are the modes used in display modes?

Ans:1. Left Entry mode

In the left entry mode, the data is entered from the left side of the display unit.

2. Right Entry Mode.

In the right entry mode, the first entry to be displayed is entered on the rightmost display.

66. What is the use of modem control unit in 8251?

Ans: The modem control unit handles the modem handshake signals to coordinate the communication between the modem and the USART.

67. Give the register organization of 8257?

Ans: The 8257 perform the DMA operation over four independent DMA channels. Each of the four channels of 8257 has a pair of two 16-bit registers. DMA address register and terminal count register. Also, there are two common registers for all the channels; namely, mode set registers and status register. Thus there are a total of ten registers. The CPU selects one of these ten registers using address lines A0- A3.

68. What is the function of DMA address register?

Ans: Each DMA channel has one DMA address register. The function of this register is to store the address of the starting memory location, which will be accessed by the DMA channel. Thus the starting address of the memory block that will be accessed by the device is first loaded in the DMA address register of the channel. Naturally, the device that wants to transfer data over a D MA channel, will access the block of memory with the starting address stored in the DMA Address Register.

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69. What is the use of terminal count register?

Ans: Each of the four DMA channels of 8257 has one terminal count register. This 16-bit register is used for ascertaining that the data transfer through a DMA channel ceases or stops after the required number of DMA cycles.

70. What is the function of mode set register in 8257?

Ans: The mode set register is used for programming the 8257 as per the requirements of the system. The function of the mode set register is to enable the DMA channels individually and also to set the various modes of operation.

71. What is interfacing?

Ans: An interface is a shared boundary between the devices which involves sharing information. Interfacing is the process of making two different systems communicate with each other.

72. List the operation modes of 8255

Ans: a) I.O Mode

i. Mode 0-Simple Input/Output. ii. Mode 1-Strobed Input/Output (Handshake mode) iii. Mode 2-Strobed bidirectional mode

b) Bit Set/Reset Mode.

73. What is a control word?

Ans: It is a word stored in a register (control register) used to control the operation of a program digital device.

74. What is the purpose of control word written to control register in 8255?

Ans: The control words written to control register specify an I/O function for each I.O port. The bit D7 of the control word determines either the I/O function of the BSR function.

75.What is the size of ports in 8255?

Ans:

Port-A : 8-bits

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Port-B : 8-bits

Port-CU : 4-bits

Port-CL : 4-bits

76. Distinguish between the memories mapped I/O peripheral I/O?

Ans:

Memory Mapped I/O 16-bit device address Data transfer between register any and

Peripheral MappedI/O 8-bit device address

general-purpose I/O port.

Data is transfer only between accumulator and I.O port

The memory map (64K) is The I/O map is independent of the memory shared between I/O device and map; 256 input device and 256 output system memory. device can be connected

More hardware is required to Less hardware is required to decode 8-bit decode 16-bit address Arithmetic or logic operation can be directly performed with I/O data address

Arithmetic or logical operation cannot be directly performed with I/O data

77. What is memory mapping?

Ans: The assignment of memory addresses to various registers in a memory chip is called as memory mapping.

78. What is I/O mapping?

Ans:The assignment of addresses to various I/O devices in the memory chip is called as I/O mapping.

79. What is an USART?

Ans:USART stands for universal synchronous/Asynchronous Receiver/Transmitter. It is a programmable communication interface that can communicate by using either synchronous or asynchronous serial data.

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80.What is the use of 8251 chip?

8251 chip is mainly used as the asynchronous serial interface between the processor and the external equipment.

81. What is 8279?

Ans:The 8279 is a programmable Keyboard/Display interface.

82. List the major components of the keyboard/Display interface.

a. Keyboard section b. Scan section c. Display section d. CPU interface section

83. What is Key bouncing?

Ans: Mechanical switches are used as keys in most of the keyboards. When a key is pressed the contact bounce back and forth and settle down only after a small time delay (about 20ms). Even though a key is actuated once, it will appear to have been actuated several times. This problem is called Key Bouncing.

84.Define HRQ?

Ans: The hold request output requests the access of the system bus. In non- cascaded 8257 systems, this is connected with HOLD pin of CPU. In cascade mode, this pin of a slave is connected with a DRQ input line of the master 8257, while that of the master is connected with HOLD input of the CPU.

85. What is the use of stepper motor?

Ans:A stepper motor is a device used to obtain an accurate position control of rotating shafts. A stepper motor employs rotation of its shaft in terms of steps, rather than continuous rotation as in case of AC or DC motor.

86. What is TXD?

Ans: TXD- Transmitter Data Output This output pin carries serial stream of the transmitted data bits along with other information like start bit, stop bits and priority bit.

87. What is RXD?

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Ans: RXD- Receive Data Input This input pin of 8251A receives a composite stream of the data to be received by 8251A.

88. What is meant by key bouncing?

Ans:Microprocessor must wait until the key reach to a steady state; this is known as Key bounce.

89. What is swapping?

The procedure of fetching the chosen program segments or data from the secondary storage into the physical memory is called swapping.

90. Write the function of crossbar switch?

Ans: The crossbar switch provides the inter connection paths between the memory module and the processor. Each node of the crossbar represents a bus switch. All these nodes may be controlled by one of these processors or by a separate one altogether.

91. What is a data amplifier?

Ans: Transceivers are the bi-directional buffers are some times they are called as data amplifiers. They are required to separate the valid data from the time multiplexed address data signal. They are controlled by 2 signals i.e DEN & DT/R.

92. What is status flag bit?

Ans: The flag register reflects the results of logical and arithmetic instructions. The flag register digits D0, D2, D4, D6, D7 an d D11 are modified according to the result of the execution of logical and arithmetic instruction. These are called as status flag bits.

93. What is a control flag?

Ans: The bits D8 and D9 namely, trap flag (TF) and interrupt flag (IF) bits, are used for controlling machine operation and thus they are called control flags.

94. What is instruction pipelining?

Ans: Major function of the bus unit is to fetch instruction bytes from the memory. In fact, the instructions are fetched in advance and stored in a queue to enable faster execution of the instructions. This concept is known as instruction pipelining.

95. Compare Microprocessor and Microcontroller.

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Ans:

Microprocessor

Microcontroller

Microprocessor contains ALU, general purpose registers, stack pointer, program counter, clock timing circuit and interrupt circuit. It has many instructions to move data between memory and CPU. It has one or two bit handling instructions. Access times for memory and I/O devices are more.

Microcontroller contains the circuitry of microprocessor and in addition it has built- in ROM, RAM, I/O devices, timers and counters. It has one or two instructions to move data between memory and CPU. It has many bit handling instructions. Less access times for built-in memory and I/O devices. Microcontroller based system requires less hardware reducing PCB size and increasing the reliability.

Microprocessor based system requires more hardware.

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