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VHDL Code For 2 Input NAND Gate: Using Functional Method

This VHDL code defines a 2-input NAND gate using two different approaches. The first uses a structural description to define the entity with inputs x and y and output f, then assigns f to be x NAND y. The second uses a functional description to similarly define the entity nandGate with inputs A and B and output F, then assigns F to be A NAND B.

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118 views

VHDL Code For 2 Input NAND Gate: Using Functional Method

This VHDL code defines a 2-input NAND gate using two different approaches. The first uses a structural description to define the entity with inputs x and y and output f, then assigns f to be x NAND y. The second uses a functional description to similarly define the entity nandGate with inputs A and B and output F, then assigns F to be A NAND B.

Uploaded by

anon_782682064
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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VHDL code for 2 input NAND gate

library ieee; use ieee.std_logic_1164.all; entity NANDGATE2 is port( x: in std_logic; y: in std_logic; f: out std_logic); end NANDGATE2; architecture behav of NANDGATE2 is begin f<= x NAND y; end behav;
USING FUNCTIONAL METHOD
: This VHDL program is a structural description -of the interactive NAND Gate on teahlab.com. --If you are new to VHDL, then notice how the -program is designed: 1] first we declare the -ENTITY, which is where we define the inputs -and the outputs of the circuit. 2] Second -we present the ARCHITECTURE, which is where -we describe the behavior and function of -the circuit. -------------------------------------------------------------import std_logic from the IEEE library library ieee; use ieee.std_logic_1164.all; --ENTITY DECLARATION: name, inputs, outputs entity nandGate is port( A, B : in std_logic; F : out std_logic); end nandGate; --FUNCTIONAL DESCRIPTION: how the NAND Gate works architecture func of nandGate is begin F <= A nand B; end func;

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