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Delta Sigma Converters

This document discusses the working principles of Delta-Sigma (Sigma-Delta) analog-to-digital converters (ADCs). It explains that Delta-Sigma ADCs use comparators and integrators to provide high resolution at low cost by applying oversampling and noise shaping techniques. The signal is oversampled and noise is shaped to move it out of the baseband. A low-pass filter then removes higher frequency components before decimation reduces the oversampled data. Examples of circuit diagrams and output waveforms are provided to illustrate the process.

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Ajay Mathapathi
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52 views11 pages

Delta Sigma Converters

This document discusses the working principles of Delta-Sigma (Sigma-Delta) analog-to-digital converters (ADCs). It explains that Delta-Sigma ADCs use comparators and integrators to provide high resolution at low cost by applying oversampling and noise shaping techniques. The signal is oversampled and noise is shaped to move it out of the baseband. A low-pass filter then removes higher frequency components before decimation reduces the oversampled data. Examples of circuit diagrams and output waveforms are provided to illustrate the process.

Uploaded by

Ajay Mathapathi
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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By: AJAY KUMAR 1SI09EC005

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

SIDDAGANGA INSTITUTE OF TECHNOLOGY


(An

autonomous institution affiliated to V.T.U. Belgaum)

TUMKUR-572103

2012-2013

Circuit uses Comparators (Delta) and Integrators (Sigma)

and so the name : DELTA-SIGMA or SIGMA-DELTA


High resolution low cost ADC. Over sampling and Noise shaping concepts are applied.

LPF Removes

higher frequency components.

Decimator

Removes oversampled data


3

X1

X2 = X1-X5
X3 = X2 + X3(n-1)

IF X3 > 0

IF X3 < 0

X4 = 1

X4 = 0

X5 = +1

X5 = -1

Fs = 32*Fs
1 0.5
Input

0 -0.5 -1

20

40

60

80

100

120

1 0.5
DAC

0 -0.5 -1

20

40

60

80

100

120

1
Sigma Delta Output

0.8 0.6 0.4 0.2 0 0 20 40 60 80 100 120

X1
0.5 0.6 0.7

X2
0 -0.5 1.6 -0.3 -0.2

X3
0 -0.5 1.1 0.8 0.6

X4
1 0 1 1 1

X5
1 -1 1 1 1

Density of ones

0.8

is more when the input is more positive. Density of zeros is more when input is more negative.

0.9
1 0.9 0.8 0.7 0.6

-0.1
0 -0.1 -0.2 -0.3 1.6

0.5
0.5 0.4 0.2 -0.1 `.5

1
1 1 1 0 1

1
1 1 1 -1 1

0.5
0.3 0 -0.2 -0.4 -0.6 -0.8 -1 -0.8 -0.6 -0.4 -0.2 0

-0.5
-0.7 -1 0.8 -1.4 0.4 0.2 0 0.2 1.6 -1.4 0.8 -1

1
0.3 -0.7 0.1 -1.3 -0.9 -0.7 -0.7 -0.5 1.1 -0.3 0.5 -0.5

1
1 0 1 0 0 0 0 0 1 0 1 0

1
1 -1 1 -1 -1 -1 -1 -1 1 -1 1 -1

Merits
High resolution at Low cost.

Very efficient noise handling.


Less strength Anti-aliasing filter requirements.

Demerits
Several clock cycles settling time or latency due to delays in

digital filtering stage. Longer conversion time, typically 100000 samples/s for 16-bit resolution and 1000 samples/s for 24-bit resolution. Limited to low frequency applications as over sampling becomes tough for high frequency applications.

Process applications.

Temperature measurements.
Digital Audio CD system applications. Latency is the major issue which keeps the

protection industry away from sigma delta ADC.

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