Final Workload
Final Workload
Ms. Pournamy ICT Mr. Assini VHDL Mr. Abhilash DSD Optical Communication NA EC-1 DSP Fuzzy ME SSD MEMS AET
Subject- 2 Lab-1 Project Design Seminar IE Communication Project Design system BCI DSP DSD(CS) DI
Lab-2 EC(CS)
Ms. Rani Ms. Jesna Mr. Arun Mr. Sreehari Ms. Sabitha Ms. Shilphy Mr. Akhilraj Ms. Geethu Mr. Tittu
17 17 18 18 16 15(2 test hr) 17(2 test hr) 15(4 test hr) 16(2 test hr)
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