SPARC (from "scalable processor architecture") is a RISC instruction set architecture (ISA) developed by Sun Microsystems and introduced in mid-1987.
SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC architecture, manage SPARC trademarks, and provide conformance testing. Implementations of the original 32-bit SPARC architecture were initially designed and used in Sun's Sun-4 workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series of processors. Later, SPARC processors were used in SMP and CC-NUMA servers produced by Sun, Solbourne and Fujitsu, among others, and designed for 64-bit operation.
SPARC International was intended to open the SPARC architecture to make a larger ecosystem for the design, which has been licensed to several manufacturers, including Texas Instruments, Atmel, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open, non-proprietary and royalty free.
SPARC64 is a microprocessor developed by HAL Computer Systems and fabricated by Fujitsu. It implements the SPARC V9 instruction set architecture (ISA), the first microprocessor to do so. SPARC64 was HAL's first microprocessor and was the first in the SPARC64 brand. It operates at 101 and 118 MHz. The SPARC64 was used exclusively by Fujitsu in their systems; the first systems, the Fujitsu HALstation Model 330 and Model 350 workstations, were formally announced in September 1995 and were introduced in October 1995, two years late. It was succeeded by the SPARC64 II (previously known as the SPARC64+) in 1996.
The SPARC64 is a superscalar microprocessor that issues four instructions per cycle and executes them out of order. It is a multichip design, consisting of seven dies: a CPU die, MMU die, four CACHE dies and a CLOCK die.
The CPU die contains the majority of logic, all of the execution units and a level 0 (L0) instruction cache. The execution units consist of two integer units, address units, floating-point units (FPUs), memory units. The FPU hardware consists of a fused multiply add (FMA) unit and a divide unit. But the FMA instructions are really fused (that is, with a single rounding) only as of SPARC64 VI. The FMA unit is pipelined and has a four-cycle latency and a one-cycle-throughput. The divide unit is not pipelined and has significantly longer latencies. The L0 instruction cache has a capacity of 4 KB, is direct-mapped and has a one-cycle latency.
Osteonectin (ON) also known as secreted protein acidic and rich in cysteine (SPARC) or basement-membrane protein 40 (BM-40) is a protein that in humans is encoded by the SPARC gene.
Osteonectin is a glycoprotein in the bone that binds calcium. It is secreted by osteoblasts during bone formation, initiating mineralization and promoting mineral crystal formation. Osteonectin also shows affinity for collagen in addition to bone mineral calcium. A correlation between osteonectin over-expression and ampullary cancers and chronic pancreatitis has been found.
The human SPARC gene is 26.5 kb long, and contains 10 exons and 9 introns and is located on chromosome 5q31-q33.
Osteonectin is a 40 kD acidic and cysteine-rich glycoprotein consisting of a single polypeptide chain that can be broken into 4 domains: 1) a Ca++ binding domain near the glutamic acid-rich region at the amino terminus (domain I), 2) a cysteine-rich domain (II), 3) a hydrophilic region (domain III), and 4) an EF hand motif at the carboxy terminus region (domain IV).
DATAR, short for Digital Automated Tracking and Resolving, was a pioneering computerized battlefield information system. DATAR combined the data from all of the sensors in a naval task force into a single "overall view" that was then transmitted back to all of the ships and displayed on plan-position indicators similar to radar displays. Commanders could then see information from everywhere, not just their own ship's sensors.
Development on DATAR was started by the Royal Canadian Navy in partnership with Ferranti Canada (later known as Ferranti-Packard) in 1949. The system proved too costly for the post-war Navy to develop alone, and when the Royal Navy and the United States Navy declined to share in the program it was ended. Both would then go on to start development of similar systems to fill this same role, the RN's Comprehensive Display System and the USN's Naval Tactical Data System.
In 1948, the Canadian Defence Research Board (DRB) sent a letter to various Canadian electronics firms informing them of their intention to start a number of projects that would partner the military, academia and private companies. A copy of the letter was sent to Ferranti Canada, then a small distributor of Ferranti's United Kingdom electrical equipment. The letter was forwarded to the then-CEO of Ferranti in the UK, Vincent Ziani de Ferranti, who became excited at the prospect of enlarging their Canadian operations largely funded by the government. At a meeting in October 1948 de Ferranti was disappointed to learn that while the DRB was equally excited, the amount of money they had to offer was basically zero.
DATAR is a computerized battlefield information system.
DATAR may also refer to: