Random test generators (often abbreviated RTG or ISG for Instruction Stream Generator) are a type of computer software that is used in functional verification of microprocessors. Their primary use lies in providing input stimulus to a device under test.
In a simulation/testbench verification environment, the simulator processes input created by the RTG and coverage monitors may be used to verify that the generator is properly testing the design.
Random test generators range in scope from simple scripts and parameterized macros that can be created in a matter of weeks to full featured systems requiring extensive software development. Random test generators are most often created by the designing organizations.
Table based test generators are the simplest RTGs available. Creation of such generators can be accomplished relatively quickly, and maintenance requirements are often low. These generators work by capturing ISA knowledge and storing it in a relational database for later use. Because of their simplistic nature, table based generators may be used by less skilled personnel to create interesting tests. There is a drawback to these generators however, as their implementation is generally restricted to simple architectures. Usage on more complex ISAs may result in an inability to reach corner-cases or create complex scenarios. Table based generators may also generate invalid tests at times.