Multi-level cell
In electronics, a multi-level cell (MLC) is a memory element capable of storing more than a single bit of information.
MLC NAND flash is a flash memory technology using multiple levels per cell to allow more bits to be stored using the same number of transistors. In single-level cell (SLC) NAND flash technology, each cell can exist in one of two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so it can store two bits of information per cell. This reduces the amount of margin separating the states and results in the possibility of more errors. Multi-level cells which are designed for low error rates are sometimes called enterprise MLC (eMLC).
Overview
The primary benefit of MLC flash memory is its lower cost per unit of storage due to the higher data density, and memory-reading software can compensate for a larger bit error rate. The higher error rate necessitates an error correcting code (ECC) that can correct multiple bit errors; for example, the SandForce SF-2500 Flash Controller can correct up to 55 bits per 512-byte sector with an unrecoverable read error rate of less than one sector per 1017 bits read. The most commonly used algorithm is Bose-Chaudhuri-Hocquenghem (BCH code). Other drawbacks of MLC NAND are lower write speeds, lower number of program-erase cycles and higher power consumption compared to SLC flash memory.