Fujitsu VP

The Fujitsu FACOM VP is a series of vector supercomputers designed, manufactured, and marketed by Fujitsu. Announced in July 1982, the FACOM VP were the first of the three initial Japanese commercial supercomputers, followed by the Hitachi HITAC S-810 in August 1982 and the NEC SX-2 in April 1983. The FACOM VP were sold until they were replaced by the VP2000 family in 1990. Developed with funding from the Ministry of International Trade and Industry, the FACOM VP was part of an effort designed to wrest control of the supercomputer market from the collection of small US-based companies like Cray Research. The FACOM VP was marketed in Japan by Fujitsu, where the majority of installations were located. Amdahl marketed the systems in the US and Siemens in Europe. The ending of the cold war during this period made the market for supercomputers dry up almost overnight, and the Japanese firms decided that their mass-production capabilities were better spent elsewhere.

Fujitsu had built a prototype vector co-processor known as the F230-75, which was installed attached to their own mainframe machines in the Japanese Atomic Energy Commission and National Aerospace Laboratory in 1977. The processor was similar in most ways to the famed Cray-1, but did not have vector chaining capabilities and was therefore somewhat slower. Nevertheless, the machines were rather inexpensive, and during the late 1970s supercomputers were seen as a source of national pride, and an effort started to commercialize the design by combining it with a scalar processor to create an all-in-one design.

Fujitsu VP2000

The VP2000 was the second series of vector supercomputers from Fujitsu. Announced in December 1988, they replaced Fujitsu's earlier FACOM VP Model E Series. The VP2000 was succeeded in 1995 by the VPP300, a massively parallel supercomputer with up to 256 vector processors.

The VP2000 was similar in many ways to their earlier designs, and in turn to the Cray-1, using a register-based vector processor for performance. For additional performance the vector units supported a special multiply-and-add instruction that could retire two results per clock cycle. This instruction "chain" is particularly common in many supercomputer applications.

Another difference is that the main scalar units of the processor ran at half the speed of the vector unit. According to Amdahl's Law computers tend to run at the speed of their slowest unit, and in this case unless the program spent most of its time in the vector units, the slower scalar performance would make it 1/2 the performance of a Cray-1 at the same speed. The reason for this seemingly odd "feature" is unclear.