AVX

AVX may refer to:

Avengers vs. X-Men

Avengers vs. X-Men (abbreviated AvX) is a 2012 crossover event that was featured in comic books published by Marvel Comics. The event, consisting of an eponymous limited series and numerous tie-in books, involves the return of the Phoenix Force and the subsequent war between the Avengers and the X-Men. The 12-issue twice-monthly series was first published in April 2012, and features a storyline by Jason Aaron, Brian Michael Bendis, Ed Brubaker, Jonathan Hickman and Matt Fraction, with a rotating team of artists including John Romita, Jr., Olivier Coipel and Adam Kubert.

The event was preceded by the four-issue limited series Avengers: X-Sanction by Jeph Loeb and Ed McGuinness and Avengers vs. X-Men #0. Avengers vs. X-Men also ties into the limited series AVX: VS, described as "the fight book" which expands upon many of the one-on-one battles featured in the main series, the digital series; Avengers vs. X-Men: Infinite, and into a number of ongoing series including Avengers, Avengers Academy, New Avengers, Secret Avengers, Uncanny X-Men, Wolverine and the X-Men and X-Men: Legacy. The event was succeeded by the limited series AvX: Consequences.

Advanced Vector Extensions

Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge processor shipping in Q1 2011 and later on by AMD with the Bulldozer processor shipping in Q3 2011. AVX provides new features, new instructions and a new coding scheme.

AVX2 expands most integer commands to 256 bits and introduces FMA. AVX-512 expands AVX to 512-bit support utilizing a new EVEX prefix encoding proposed by Intel in July 2013 and first supported by Intel with the Knights Landing processor scheduled to ship in 2015.

Advanced Vector Extensions

The width of the SIMD register file is increased from 128 bits to 256 bits, and renamed from XMM0–XMM7 to YMM0–YMM7 (in x86-64 mode, YMM0–YMM15). In processors with AVX support, the legacy SSE instructions (which previously operated on 128-bit XMM registers) can be extended using the VEX prefix to operate on the lower 128 bits of the YMM registers.