Using stochastic logic for efficient pattern recognition analysis
JL Rosselló, V Canals, I de Paul… - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
JL Rosselló, V Canals, I de Paul, J Segura
2008 IEEE International Joint Conference on Neural Networks (IEEE …, 2008•ieeexplore.ieee.orgWe present a pattern recognition methodology based on stochastic logic. The technique
implements a parallel comparison of input data from a set of sensors to various pre-stored
categories. Smart pulse-based stochastic-logic blocks are constructed to provide an efficient
architecture that is able to implement Bayesian techniques, thus providing a low-cost
solution in terms of gate count and power dissipation. The proposed architecture is applied
to a specific navigation problem demonstrating that the system provides an almost optimal …
implements a parallel comparison of input data from a set of sensors to various pre-stored
categories. Smart pulse-based stochastic-logic blocks are constructed to provide an efficient
architecture that is able to implement Bayesian techniques, thus providing a low-cost
solution in terms of gate count and power dissipation. The proposed architecture is applied
to a specific navigation problem demonstrating that the system provides an almost optimal …
We present a pattern recognition methodology based on stochastic logic. The technique implements a parallel comparison of input data from a set of sensors to various pre-stored categories. Smart pulse-based stochastic-logic blocks are constructed to provide an efficient architecture that is able to implement Bayesian techniques, thus providing a low-cost solution in terms of gate count and power dissipation. The proposed architecture is applied to a specific navigation problem demonstrating that the system provides an almost optimal solution.
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