Partial scan approach for secret information protection

M Inoue, T Yoneda, M Hasegawa… - 2009 14th IEEE …, 2009 - ieeexplore.ieee.org
M Inoue, T Yoneda, M Hasegawa, H Fujiwara
2009 14th IEEE European Test Symposium, 2009ieeexplore.ieee.org
This paper proposes a secure scan design method which protects the circuits containing
secret information such as cryptographic circuits from scan-based side channel attacks. The
proposed method prevents the leakage of secret information by partial scan design based
on a balanced structure. We also guarantee the testability of both the design under test and
DFT circuitry, and therefore, realize both security and testability. Experiments for RSA circuit
shows the effectiveness of the proposed method.
This paper proposes a secure scan design method which protects the circuits containing secret information such as cryptographic circuits from scan-based side channel attacks.The proposed method prevents the leakage of secret information by partial scan design based on a balanced structure. We also guarantee the testability of both the design under test and DFT circuitry, and therefore, realize both security and testability. Experiments for RSA circuit shows the effectiveness of the proposed method.
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