DAPSCO: Distance-aware partially shared cache organization

A Garcia-Guirado, R Fernández-Pascual… - ACM Transactions on …, 2012 - dl.acm.org
A Garcia-Guirado, R Fernández-Pascual, A Ros, JM Garcia
ACM Transactions on Architecture and Code Optimization (TACO), 2012dl.acm.org
Many-core tiled CMP proposals often assume a partially shared last level cache (LLC) since
this provides a good compromise between access latency and cache utilization. In this
paper, we propose a novel way to map memory addresses to LLC banks that takes into
account the average distance between the banks and the tiles that access them. Contrary to
traditional approaches, our mapping does not group the tiles in clusters within which all the
cores access the same bank for the same addresses. Instead, two neighboring cores access …
Many-core tiled CMP proposals often assume a partially shared last level cache (LLC) since this provides a good compromise between access latency and cache utilization. In this paper, we propose a novel way to map memory addresses to LLC banks that takes into account the average distance between the banks and the tiles that access them. Contrary to traditional approaches, our mapping does not group the tiles in clusters within which all the cores access the same bank for the same addresses. Instead, two neighboring cores access different sets of banks minimizing the average distance travelled by the cache requests. Results for a 64-core CMP show that our proposal improves both execution time and the energy consumed by the network by 13% when compared to a traditional mapping. Moreover, our proposal comes at a negligible cost in terms of hardware and its benefits in both energy and execution time increase with the number of cores.
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