As CMOS technology scaling drives down the feature size of transistor into a nano-scale regime, there are many new challenges facing today's circuit design. In this paper, the landscape of technology scaling is first examined. The paper then focuses on how to overcome some of the key design challenges through innovative circuit approaches. Several real design examples in various areas, including SRAMs and critical analog building blocks, are used to illustrate these advanced circuit design techniques that will help further technology scaling in the future.