Challenges and opportunities for circuit design in nano-scale CMOS technologies
K Zhang - 2012 Proceedings of the ESSCIRC (ESSCIRC), 2012 - ieeexplore.ieee.org
K Zhang
2012 Proceedings of the ESSCIRC (ESSCIRC), 2012•ieeexplore.ieee.orgCMOS technology scaling trend and latest technology innovations will be discussed first.
Then the paper will focus on the challenges in several critical circuit areas, including both
analog and memory for high-performance microprocessors. Some innovative design
solutions to enable future scaling will be discussed.
Then the paper will focus on the challenges in several critical circuit areas, including both
analog and memory for high-performance microprocessors. Some innovative design
solutions to enable future scaling will be discussed.
CMOS technology scaling trend and latest technology innovations will be discussed first. Then the paper will focus on the challenges in several critical circuit areas, including both analog and memory for high-performance microprocessors. Some innovative design solutions to enable future scaling will be discussed.
ieeexplore.ieee.org
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