Backpropagation multilayer perceptron: A modular implementation
Artificial Neural Networks: International Workshop IWANN'91 Granada, Spain …, 1991•Springer
In this paper we present a VLSI systolic architecture for implementing the multilayer
perceptron network. Both the retrieving phase and the backpropagation learning algorithm
with a sigmoid nonlinearity are considered. The implementation is based upon a variable
size ring systolic array which is highly regular thus favouring integration. This architecture
can also be expanded in a parallel or cascade fashion to implement arbitrary size networks.
perceptron network. Both the retrieving phase and the backpropagation learning algorithm
with a sigmoid nonlinearity are considered. The implementation is based upon a variable
size ring systolic array which is highly regular thus favouring integration. This architecture
can also be expanded in a parallel or cascade fashion to implement arbitrary size networks.
Abstract
In this paper we present a VLSI systolic architecture for implementing the multilayer perceptron network. Both the retrieving phase and the backpropagation learning algorithm with a sigmoid nonlinearity are considered. The implementation is based upon a variable size ring systolic array which is highly regular thus favouring integration. This architecture can also be expanded in a parallel or cascade fashion to implement arbitrary size networks.
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