A new PLA design for universal testability

H Fujiwara - IEEE Transactions on Computers, 2009 - ieeexplore.ieee.org
IEEE Transactions on Computers, 2009ieeexplore.ieee.org
A new design of universally testable PLA's is presented in which all multiple faults can be
detected by a universal test set which is independent of the function being realized by the
PLA. The proposed design has the following properties. 1) It can be tested with function-
independent test patterns; hence, no test pattern generation is required. 2) The amount of
extra hardware is significantly decreased compared to the previous designs of universally
testable PLA's. 3) Very high fault coverage is achieved, ie, all single and multiple stuck …
A new design of universally testable PLA's is presented in which all multiple faults can be detected by a universal test set which is independent of the function being realized by the PLA. The proposed design has the following properties. 1) It can be tested with function-independent test patterns; hence, no test pattern generation is required. 2) The amount of extra hardware is significantly decreased compared to the previous designs of universally testable PLA's. 3) Very high fault coverage is achieved, i. e., all single and multiple stuck faults, crosspoint faults, and adjacent line bridging faults are detected. 4) It is appropriate for built-in testing approaches. 5) It can be applied to the high-density PLA's using array folding techniques.
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