[M68k] implement -mxgot #119803
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[M68k] implement -mxgot #119803
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@mshockwave Anything you could do to help with this? FWIW, we have the full M68000 SysV ELF ABI available now, see: https://people.debian.org/~glaubitz/m68k-sysv-abi.pdf |
Oh I thought this is still a draft PR and that's why it didn't pop up in my radar. @knickish is this ready for review? |
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It is not :/ I haven't figured out how to get this to work yet |
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Although, if you wanted to take a look and tell me what I'm doing wrong that would be appreciated. Otherwise will just keep poking at it as I have time |
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@jrtc27 Do you have any suggestions on this? |
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I think implementing support for After this change, trying to build a cross-compiler for @mshockwave Any chance you could get |
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I have applied the patch to Rust's LLVM compiler and then patched the diff --git a/src/bootstrap/bootstrap.py b/src/bootstrap/bootstrap.py
index 40e08361a0f..c453a22ff0b 100644
--- a/src/bootstrap/bootstrap.py
+++ b/src/bootstrap/bootstrap.py
@@ -1117,6 +1117,9 @@ class RustBuild(object):
if deny_warnings:
env["RUSTFLAGS"] += " -Dwarnings"
+ if self.build_triple().startswith('m68k'):
+ env["RUSTFLAGS"] += " -Cllvm-args=-mxgot"
+
# Add RUSTFLAGS_BOOTSTRAP to RUSTFLAGS for bootstrap compilation.
# Note that RUSTFLAGS_BOOTSTRAP should always be added to the end of
# RUSTFLAGS to be actually effective (e.g., if we have `-Dwarnings` inUnfortunately, that doesn't work. |
mshockwave
reviewed
Aug 11, 2025
| ; CHECK-NEXT: suba.l %a0, %a1 ; encoding: [0x93,0xc8] | ||
| ; CHECK-NEXT: move.l #VBRTag@GOTOFF, %d0 ; encoding: [0x20,0x3c,A,A,A,A] | ||
| ; CHECK-NEXT: ; fixup A - offset: 2, value: VBRTag@GOTOFF, kind: FK_Data_4 | ||
| ; CHECK-NEXT: move.b (1,%a1,%d0), %d0 ; encoding: [0x10,0x31,0x08,0x01] |
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I think there are two problems here: (1) %a1 tries to compute the "pc-relative" offset of the GOT -- but the PC was from several instructions before (pointed at lea _GLOBAL_OFFSET_TABLE_, %a1), rather than this instruction, so we need to add another offset to compensate the difference (2) Assuming we have the correct %a1 value, I don't think (1,%a1,%d0) here is correct: what we really want is %a1 + pc + %d0 + 1, which should probably use Program Counter Memory Indirect Postindexed addressing mode, or the "x" addressing mode. But sadly we haven't implemented that one yet
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Reading GCC's |
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Load the pc-rel got address to the base register in two steps to avoid the i16 displacement size limitation on the
qaddressing mode