ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain #5844
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Use the entire SRAM2 with NVIC buffer + stack Increase HEAP size to 0x10000 in SRAM1 Increase the available SRAM1 by 0x2000
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Local test report: |
bcostm
reviewed
Jan 12, 2018
| place in SRAM1_region { readwrite, block STACKHEAP }; | ||
| place in SRAM2_region { }; | ||
| place in SRAM1_region { readwrite, block HEAP }; | ||
| place in SRAM2_region { block CSTACK }; |
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I'm not sure but shouldn't we add the readwrite keyword ?
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Hello @bcostm Bruno
Your suggestion seemed good to me, but it does not link
It gives a long list of ambigous section match like this one
Error[Lc037]: ambiguous section match: "zi section .bss in main.o" matches more than one pattern "rw" (at line 36 of "C:/MCDGit7/mbed-os/BUILD/tests/DISCO_L475VG_IO T01A/IAR/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4 75xG/device/TOOLCHAIN_IAR/stm32l475xx.icf") "rw" (at line 37 of "C:/MCDGit7/mbed-os/BUILD/tests/DISCO_L475VG_IO T01A/IAR/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4 75xG/device/TOOLCHAIN_IAR/stm32l475xx.icf")
Is there any reason for asking this extra readwrite keyword ?
Cheers
Armelle
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That is correct, readwrite specifies: Place .data, .bss, and .noinit. Therefore the linking error
It is good as it is
0xc0170
approved these changes
Jan 22, 2018
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/morph build |
1 similar comment
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/morph build |
Build : SUCCESSBuild number : 909 Triggering tests/morph test |
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Odd build failure, appears to be unrelated to PR. Relaunching uvisor test. |
Exporter Build : ABORTEDBuild number : 584 |
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/morph export-build |
Exporter Build : SUCCESSBuild number : 586 |
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Description
DISCO_L475VG_IOT01A has 128 k of SRAM (32k in SRAM2 + 96k in SRAM1)
At the moment, for IAR toolchain, SRAM2 only contains the nvic vector.
With this PR:
Use the entire SRAM2 with NVIC buffer + stack
Increase HEAP size to 0x10000 in SRAM1
Increase the available SRAM1 by 0x2000
Status
READY
Todos
Steps to test or reproduce
I'm working on the wifi driver and I've had memory mapping issues with mbed-tls-client example