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ST: Watchdog: Fix timeout registers value calculation #11178

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Merged
merged 1 commit into from
Aug 20, 2019

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Tharazi97
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@Tharazi97 Tharazi97 commented Aug 7, 2019

Description

Proposition of fixing: #11175
Changes only implementation of watchdog on ST devices, but problem applies mainly to the meaning of this test. I don't know if this is a right way of fixing that. @fkjagodzinski might help.

Pull request type

[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change

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@maciejbocianski @mprse @jamesbeyond @fkjagodzinski

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@ciarmcom
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ciarmcom commented Aug 7, 2019

@Tharazi97, thank you for your changes.
@mprse @maciejbocianski @jamesbeyond @fkjagodzinski @ARMmbed/mbed-os-core @ARMmbed/mbed-os-test @ARMmbed/mbed-os-maintainers please review.

@@ -18,6 +18,10 @@
#error [NOT_SUPPORTED] Watchdog not supported for this target
#else

#ifndef MAX_IWDG_PR
#define MAX_IWDG_PR 0x6
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Why is the max pre-scaler defined as 6 ?

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Right, I didn't look to other targets than STM and assumed that it is used like this in all boards. I'll take a peek to other drivers and make it work on all devices.

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mbed-ci commented Aug 7, 2019

Test run: FAILED

Summary: 3 of 3 test jobs failed
Build number : 1
Build artifacts

Failed test jobs:

  • jenkins-ci/mbed-os-ci_build-ARM
  • jenkins-ci/mbed-os-ci_build-GCC_ARM
  • jenkins-ci/mbed-os-ci_build-IAR

// The watchdog should trigger at, or after the timeout value.
TEST_ASSERT(watchdog.get_timeout() >= max_timeout);
// The watchdog should trigger at, or after the timeout value - maximum time spend on prescaller.
uint32_t max_window = ceil((float)(4 << MAX_IWDG_PR) * 1000 / LSI_VALUE);
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this is also one MCU family specific value. See LSI_VALUE error in the build logs.

The test need to be generic and using driver functionality (=test).

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Tharazi97 commented Aug 8, 2019

I've changed the function in stm watchdog_api.c so it rounds the value of timeout up. This makes the test pass, but it still needs to be discussed if it's the right way of doing that. @fkjagodzinski might help in clarifying this problem.

@@ -225,7 +225,7 @@ void test_start_max_timeout()
Watchdog &watchdog = Watchdog::get_instance();
uint32_t max_timeout = watchdog.get_max_timeout();
TEST_ASSERT_TRUE(watchdog.start(max_timeout));
// The watchdog should trigger at, or after the timeout value.
// The watchdog should trigger at, or after the timeout value;
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this change is not related. the rest of the comments in this file has it as it was. please revert

@0xc0170 0xc0170 requested a review from a team August 9, 2019 12:39
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0xc0170 commented Aug 9, 2019

This currently is touching only ST targets, this should be stated (title and updated comment about the scope of this fix)

@Tharazi97 Tharazi97 force-pushed the watchdog_max_timeout branch from 6e9eafd to eb558de Compare August 9, 2019 12:54
@Tharazi97 Tharazi97 changed the title proposition of fix watchdog start max timeout proposition of fix watchdog start max timeout (tweak ST implementation) Aug 9, 2019
@Tharazi97 Tharazi97 changed the title proposition of fix watchdog start max timeout (tweak ST implementation) proposition of fix watchdog start max timeout (tweak STM implementation) Aug 9, 2019
@Tharazi97 Tharazi97 force-pushed the watchdog_max_timeout branch from eb558de to 302be42 Compare August 12, 2019 07:46
@Tharazi97 Tharazi97 changed the title proposition of fix watchdog start max timeout (tweak STM implementation) fix watchdog start max timeout and test update config (tweak STM implementation) Aug 12, 2019
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  • Please clean up the commit history -- if you make an update and then revert it, this shouldn't be visible here.
  • Please update the commit messages -- e.g. change in stm watchdog doesn't say much. The commit message may be as long as you need it to be to explain why and what was updated. Take a look at our commit history for reference.
  • If the code needs an astyle update to pass the CI, please keep that in a separate commit.


// Convert Prescaler_divider bits (PR) of Prescaler_register (IWDG_PR) and a timeout value [ms]
// to Watchdog_counter_reload_value bits (RL) of Reload_register (IWDG_RLR)
#define PR_TIMEOUT_MS2RL(PR_BITS, TIMEOUT_MS) \
((TIMEOUT_MS) * (LSI_VALUE) / (PR2PRESCALER_DIV(PR_BITS)) / 1000UL)
((uint32_t)ceil((float)(TIMEOUT_MS) * (LSI_VALUE) / (PR2PRESCALER_DIV(PR_BITS)) / 1000UL))
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Avoid using floating point if possible. The code below will give same values as ceil().

Suggested change
((uint32_t)ceil((float)(TIMEOUT_MS) * (LSI_VALUE) / (PR2PRESCALER_DIV(PR_BITS)) / 1000UL))
(((TIMEOUT_MS) * (LSI_VALUE) / (PR2PRESCALER_DIV(PR_BITS)) + 999UL) / 1000UL)

const uint32_t rl = PR_TIMEOUT_MS2RL(pr, config->timeout_ms);
uint32_t rl = PR_TIMEOUT_MS2RL(pr, config->timeout_ms);
if (rl > MAX_IWDG_RL) {
rl = MAX_IWDG_RL;
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Isn't that a dead code? pr != INVALID_IWDG_PR should guarantee that rl is also valid.

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@Tharazi97 could you also update the name and the description of this PR? From what I see now, this could be as simple as ST: Watchdog: Fix timeout registers value calculation. ;)

@Tharazi97 Tharazi97 changed the title fix watchdog start max timeout and test update config (tweak STM implementation) ST: Watchdog: Fix timeout registers value calculation Aug 14, 2019
@Tharazi97 Tharazi97 force-pushed the watchdog_max_timeout branch from 302be42 to a75d43b Compare August 14, 2019 10:58
Change the calculation method of rl so it is rounded up.
@Tharazi97 Tharazi97 force-pushed the watchdog_max_timeout branch from a75d43b to df43350 Compare August 14, 2019 11:03
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NUCLEO_L073RZ watchdog tests are now OK!
DISCO_L475VG_IOT01A watchdog tests are still OK.

Thx for the fix

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0xc0170 commented Aug 19, 2019

CI started

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mbed-ci commented Aug 20, 2019

Test run: SUCCESS

Summary: 11 of 11 test jobs passed
Build number : 2
Build artifacts

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@donatieng we fixed a watchdog issue related to NUCLEO_L073RZ and someother STM target, you might need to aware of this change

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7 participants