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NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs

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Published 21 February 2014 © CERN 2014
, , Citation R Ammendola et al 2014 JINST 9 C02023 DOI 10.1088/1748-0221/9/02/C02023

1748-0221/9/02/C02023

Abstract

NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.

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