Background
LLVM currently has no support for the divide operation in the DemandedBits Analysis, which is crucial for code size optimizations and is used in many places like in BDCE and others.
However, I believe some opportunities still exist but the guarantee from the DemandedBits Analysis cannot be preserved.
The guarantee states : " A demanded bit is one that contributes to a result. Bits that are not demanded can be either zero or one without affecting control or data flow"
Example
Suppose we have a division operation
0000 1101 / 0000 0011
We know that the upper 4 bits of the dividend (0000 1101) are not demanded in a way but they must not change to one. If this was a 64-bit or 32-bit operation we could do it in a smaller width, maybe dropping an extension in a computation chain.
If we consider the upper bits to be not demanded, another pass can convert them to 1, but this is not correct.
Proposal
The proposal is to add a new small analysis for the divide, and maybe for other operators later, to distinguish the usage of the upper bits.
I have broken down some cases that can occur.
- The upper bits can be ignored, but must not change to 1.
- The upper bits can be changed and dropped ( not demanded).
- The upper bits cannot be changed or dropped.