LLVM Weekly - #593, May 12th 2025

Community Newsletters
1

LLVM Weekly - #593, May 12th 2025

If you prefer, you can read the canonical version of this issue at https://llvmweekly.org/issue/593.

Welcome to the five hundred and ninety-third issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at https://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback via email: [email protected], or Mastodon: @[email protected] / @[email protected], or Bluesky: @llvmweekly.org / @asbradbury.org.

News and articles from around the web and events

Recordings from EuroLLVM 2025 have started to be posted to YouTube.

If you might like to run a workshop the day before the 2025 LLVM Developers’ Meeting, now is the time to submit the proposal (deadline June 1st).

My Igalia colleague Mikhail Gadelha has a blog post on work to improve RISC-V LLVM performance as compared to GCC, a project done through RISE and also summarised on their blog. Mikhail’s SpacemiT X60 scheduling model patch was also mentioned on Phoronix.

I talk about tech in general, LLVM Weekly and projects I’ve been involved in such as RISC-V, LLVM, lowRISC, Raspberry Pi, and work at Igalia on the latest episode of the TMPDIR podcast hosted by Khem Raj and Cliff Brake. Not so on-top for LLVM, but if you’re interested in my computer setup enjoy scrolling through lots of Linux configuration notes you might like my blog post on the MiniBook X N150 - the netbook isn’t dead (yet!). I also wrote up suite-helper, the helper script I split out to handle my most common tasks when building and diving into llvm-test-suite configurations - I’d highlight particularly the reduce-ll helper to llvm-reduce a target assembly snippet for a given .c input. Finally I’m presenting a talk about improvements to RISC-V vector code generation in LLVM at the RISC-V Summit Europe in Paris this week. If you’re here, be sure to say hi!

The next LLVM Bay Area Monthly Meetup will take place on Monday 12th May.

According to the LLVM Calendar in the coming week there will be the following:

  • Office hours with the following hosts: Alexey Bader, Alina Sbirlea, Kristof Beyls, Johannes Doerfert, Aaron Ballman.
  • Online sync-ups on the following topics: Flang, modules, libc++, LLVM/offload, BOLT, SPIR-V, OpenMP for Flang, memory safety working group.
  • For more details see the LLVM calendar, getting involved documentation on online sync ups and office hours.

On the forums

LLVM commits

  • reportFatalInternalError and reportFatalUsageError were introduced and report_fatal_error was deprecated. As discussed at length in a previous RFC, report_fatal_error generates a backtrace and an invitation to submit a bug report unless GenCrashDiag=false is passed. You would now use reportFatalInternalError for situations indicating a bug in LLVM (crash dialog generated) and reportFatalUsageError for exiting with an error but no crash dialog. b492ec5, 562a455.

  • An initial scheduler model was added for the SpacemiT-X60 RISC-V CPU. 4eac576.

  • A new flag was added to disable the SchedModel/Itineraries during scheduling. 00e7a02.

  • It is now documented that an attempt to evade a non-permanent ban frmo the project will result in being banned permanently. f2f4eac.

  • The uselist was removed for ConstantData, meaning it is no longer possible to inspect the uses of ConstantData. 9383fb2, 4d60c6d.

  • Assembly printer passes are now registered in the pass registry meaning you can use llc -start-before=<target>-asm-printer in tests. 675cb70.

  • As a debug tool, new statistics were added to track the number of instructions that remain in source order after scheduling and the total number of instructions scheduled. A range of other statistics were added too. ddfdecb, cdde6a6.

  • Initial code generation support was added for the RISC-V Zvqdotq (dot product) extension. 1ac489c.

  • A new TargetInstrInfo hook was added and used in MachineCopyPropagation to simplify/canonicalise instructions after copy propagation (there’s a pattern where tail duplication followed copy propagation results in operands that are the zero register, which depending on the opcode might mean it can be simplified to a canonical move or load-immediate). 52b345d.

  • The last mentions of IRC were removed from LLVM’s documentation, as it’s not used by the community any more. 7548cec.

  • RISC-V SDNodes are now tablegenerated (similar cleanups were made recently to other backends, but I think this is the most in-depth). c60db55.

  • $HOME is now passed through to tests run via lit. 635c648.

  • Documentation started to land on MLGO (Machine Learning Guided Optimisation). 77d1db6d.

Clang commits

  • -Wjump-bypasses-init was renamed to -Wjump-misses-init. 43c05d9.

  • The core language parts of the C++ trivial relocation proposal were implemented and the previously implemented __is_trivially_reloctable was deprecated in favour of __builtin_is_cpp_trivially_relocatable. 300d402, 09c80e2.

  • A cir-simplify pass was added. 2eb6545.

  • __ptrauth can now be applied to integer types. 65a6cbd.

Other project commits

  • crt1 for the UEFI platform was added to LLVM’s libc. 865fb9c.

  • libcxx added the __is_replaceable type trait. 45d493b.

  • MLIR’s LLVM dialect gained ProfileSummary module flag support. 28934fe.

  • An --affine-raise-from-memref pass was added to MLIR. 7aabf47.

1 Like