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ORCIDAnantha P. Chandrakasan
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- affiliation: Massachusetts Institute of Technology, Cambridge, USA
- affiliation (PhD 1994): University of California at Berkeley, Berkeley, CA, USA
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2020 – today
- 2024
[j162]Saurav Maji
, Kyungmi Lee, Anantha P. Chandrakasan:
SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware Embedded Neural Networks Using Timing Side-Channel Information. IEEE Comput. Archit. Lett. 23(1): 133-136 (2024)- [j161]Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan:
A 1.54-mm2, 264-GHz Wake-Up Receiver With Integrated Cryptographic Authentication for Ultra-Miniaturized Platforms. IEEE J. Solid State Circuits 59(3): 653-667 (2024) - [j160]Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee:
A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. IEEE J. Solid State Circuits 59(4): 1158-1170 (2024) - [j159]Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan:
An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks. IEEE J. Solid State Circuits 59(9): 3106-3116 (2024) - [c249]Maitreyi Ashok, Saurav Maji, Xin Zhang, John Cohn, Anantha P. Chandrakasan:
A Secure Digital In-Memory Compute (IMC) Macro with Protections for Side-Channel and Bus Probing Attacks. CICC 2024: 1-2 - [c248]Deniz Umut Yildirim, Jaeyoung Jung, Amr Elsakka, Giuseppe Moschetti, Miguel M. Lopez, Jonas Hansryd, Tomás Palacios, Anantha P. Chandrakasan:
A 0.7cm2 3.5GHz, -31 dBm Sensitivity Batteryless 5G Energy Harvester Backscattering Chip for Asset Identification in IoT-Enabled Warehouses. CICC 2024: 1-2 - [c247]Rashmi S. Agrawal, Anantha P. Chandrakasan, Ajay Joshi:
HEAP: A Fully Homomorphic Encryption Accelerator with Parallelized Bootstrapping. ISCA 2024: 756-769 - [c246]Eunseok Lee, Xibi Chen, Maitreyi Ashok, Jae-Yeon Won, Anantha P. Chandrakasan, Ruonan Han:
12.5 A Packageless Anti-Tampering Tag Utilizing Unclonable Sub-THz Wave Scattering at the Chip-Item Interface. ISSCC 2024: 226-228 - 2023
- [j158]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan:
A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. IEEE J. Solid State Circuits 58(1): 141-154 (2023) - [j157]Qijun Liu, Miguel Jimenez, Maria Eugenia Inda, Arslan Riaz, Timur Zirtiloglu, Anantha P. Chandrakasan, Timothy K. Lu, Giovanni Traverso, Phillip M. Nadeau, Rabia Tugce Yazicigil:
A Threshold-Based Bioluminescence Detector With a CMOS-Integrated Photodiode Array in 65 nm for a Multi-Diagnostic Ingestible Capsule. IEEE J. Solid State Circuits 58(3): 838-851 (2023) - [c245]Ruicong Chen, Anantha P. Chandrakasan, Hae-Seung Lee:
Sniff-SAR: A 9.8fJ/c.-s 12b secure ADC with detectiondriven protection against power and EM side-channel attack. CICC 2023: 1-2 - [c244]Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan:
A 1.54mm2 Wake-Up Receiver Based on THz Carrier Wave and Integrated Cryptographic Authentication. CICC 2023: 1-2 - [c243]Yeseul Jeon, Saurav Maji, So-Yoon Yang, Muhammed Suleman S. Thaniana, Adam Gierlach, Ian Ballinger, George Selsing, Injoo Moon, Josh Jenkins, Andrew Pettinari, Niora Fabian, Alison M. Hayward, Giovanni Traverso, Anantha P. Chandrakasan:
Secure and Stable Wireless Communication for an Ingestible Device. EMBC 2023: 1-6 - [c242]So-Yoon Yang, Yeseul Jeon, Rishabh Mittal, Kewang Nan, Yiyuan Yang, Emily Kolaya, Injoo Moon, Kyeong-Ho Kim, Miguel Jimenez, Betar M. Gallant, Anantha P. Chandrakasan, Giovanni Traverso:
Energy-Efficient Ingestible Drug Delivery System in the Dynamic Gastrointestinal Environment. EMBC 2023: 1-5 - [c241]Saurav Maji, Kyungmi Lee, Cheng Gongye, Yunsi Fei, Anantha P. Chandrakasan:
An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks. ESSCIRC 2023: 233-236 - [c240]Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi:
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. HPCA 2023: 882-895 - [c239]Zexi Ji, Hanrui Wang, Miaorong Wang, Win-San Khwa, Meng-Fan Chang, Song Han, Anantha P. Chandrakasan:
A Fully-Integrated Energy-Scalable Transformer Accelerator Supporting Adaptive Model Configuration and Word Elimination for Language Understanding on Edge Devices. ISLPED 2023: 1-6 - [c238]Kyungmi Lee, Mengjia Yan, Joel S. Emer, Anantha P. Chandrakasan:
SecureLoop: Design Space Exploration of Secure DNN Accelerators. MICRO 2023: 194-208 - [c237]Rashmi Agrawal, Leo de Castro, Chiraag Juvekar, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi:
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption. MICRO 2023: 685-697 - [c236]Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee:
A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. VLSI Technology and Circuits 2023: 1-2 - [d1]Hui Sun, Saurav Maji, Anantha P. Chandrakasan, Benedetto Marelli:
Integrating Biopolymer Design with Physical Unclonable Functions for Anticounterfeiting and Product Traceability in Agriculture. Zenodo, 2023
- 2022
- [j156]Maitreyi Ashok, Matthew J. Turner, Ronald L. Walsworth, Edlyn V. Levine, Anantha P. Chandrakasan:
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images. ACM J. Emerg. Technol. Comput. Syst. 18(4): 67:1-67:25 (2022) - [j155]Muhammad Ibrahim Wasiq Khan, Jongchan Woo, Xiang Yi, Mohamed I. Ibrahim, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han:
A 0.31-THz Orbital-Angular-Momentum (OAM) Wave Transceiver in CMOS With Bits-to-OAM Mode Mapping. IEEE J. Solid State Circuits 57(5): 1344-1357 (2022) - [j154]Preet Garcha, Viola Schaffer, Baher Haroun, Srinath Ramaswamy, Jim Wieser, Jeffrey H. Lang, Anantha P. Chandrakasan:
A Duty-Cycled Integrated-Fluxgate Magnetometer for Current Sensing. IEEE J. Solid State Circuits 57(9): 2741-2751 (2022) - [c235]Mohamed R. Abdelhamid, Unsoo Ha, Utsav Banerjee, Fadel Adib, Anantha P. Chandrakasan:
Wireless, Batteryless, and Secure Implantable System-on-a-Chip for 1.37mmHg Strain Sensing with Bandwidth Reconfigurability for Cross-Tissue Adaptation. CICC 2022: 1-2 - [c234]Maitreyi Ashok, Edlyn V. Levine, Anantha P. Chandrakasan:
Randomized Switching SAR (RS-SAR) ADC Protections for Power and Electromagnetic Side Channel Security. CICC 2022: 1-2 - [c233]Kyungmi Lee, Anantha P. Chandrakasan:
SparseBFA: Attacking Sparse Deep Neural Networks with the Worst-Case Bit Flips on Coordinates. ICASSP 2022: 4208-4212 - [c232]Ruicong Chen, H. T. Kung, Anantha P. Chandrakasan, Hae-Seung Lee:
A Bit-level Sparsity-aware SAR ADC with Direct Hybrid Encoding for Signed Expressions for AIoT Applications. ISLPED 2022: 11:1-11:6 - [c231]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan:
A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks. ISSCC 2022: 518-520 - [c230]Jongchan Woo, Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Ruonan Han, Anantha P. Chandrakasan, Rabia Tugce Yazicigil:
Physical-Layer Security for THz Communications via Orbital Angular Momentum Waves. SiPS 2022: 1-6 - [c229]Ruicong Chen, Hanrui Wang, Anantha P. Chandrakasan, Hae-Seung Lee:
RaM-SAR: A Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s Secure Random-Mapping SAR ADC with Power and EM Side-channel Attack Resilience. VLSI Technology and Circuits 2022: 94-95 - [i19]Utsav Banerjee, Anantha P. Chandrakasan:
A Low-Power BLS12-381 Pairing Crypto-Processor for Internet-of-Things Security Applications. CoRR abs/2201.07496 (2022) - [i18]Maitreyi Ashok, Matthew J. Turner, Ronald L. Walsworth, Edlyn V. Levine, Anantha P. Chandrakasan:
Hardware Trojan Detection Using Unsupervised Deep Learning on Quantum Diamond Microscope Magnetic Field Images. CoRR abs/2204.14228 (2022) - [i17]Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi:
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. CoRR abs/2207.11872 (2022) - 2021
- [j153]Saurav Maji, Utsav Banerjee, Anantha P. Chandrakasan:
Leaky Nets: Recovering Embedded Neural Network Models and Inputs Through Simple Power and Timing Side-Channels - Attacks and Defenses. IEEE Internet Things J. 8(15): 12079-12092 (2021) - [j152]Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Chiraag Shashikant Juvekar, Wanyeong Jung, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han:
CMOS THz-ID: A 1.6-mm² Package-Less Identification Tag Using Asymmetric Cryptography and 260-GHz Far-Field Backscatter Communication. IEEE J. Solid State Circuits 56(2): 340-354 (2021) - [j151]Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee:
S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance. IEEE J. Solid State Circuits 56(3): 844-854 (2021) - [j150]Kyungmi Lee, Anantha P. Chandrakasan:
Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks. IEEE Open J. Circuits Syst. 2: 843-855 (2021) - [j149]Xiang Yi, Cheng Wang, Zhi Hu, Jack W. Holloway, Muhammad Ibrahim Wasiq Khan, Mohamed I. Ibrahim, Mina Kim, Georgios C. Dogiamis, Bradford Perkins, Mehmet Kaynak, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Ruonan Han:
Emerging Terahertz Integrated Systems in Silicon. IEEE Trans. Circuits Syst. I Regul. Pap. 68(9): 3537-3550 (2021) - [c228]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
Securing Embedded Medical Devices using Dual-Factor Authentication. CBMS 2021: 574-579 - [c227]Utsav Banerjee, Anantha P. Chandrakasan:
A Low-Power Elliptic Curve Pairing Crypto-Processor for Secure Embedded Blockchain and Functional Encryption. CICC 2021: 1-2 - [c226]Qijun Liu, Arslan Riaz, Timur Zirtiloglu, Maria Eugenia Inda, Miguel Jimenez, Yong Lai, Christoph Steiger, Elizabeth Diamond, Giovanni Traverso, Timothy K. Lu, Anantha P. Chandrakasan, Phillip M. Nadeau, Rabia Tugce Yazicigil:
Zero-Crossing-Based Bio-Engineered Sensor. CICC 2021: 1-2 - [c225]Kaustav Brahma, Viksit Kumar, Anthony E. Samir, Anantha P. Chandrakasan, Yonina C. Eldar:
Efficient Binary Cnn For Medical Image Segmentation. ISBI 2021: 817-821 - [c224]Preet Garcha, Viola Schaffer, Baher Haroun, Srinath Ramaswamy, Jim Wieser, Jeffrey H. Lang, Anantha P. Chandrakasan:
A 770 kS/s Duty-Cycled Integrated-Fluxgate Magnetometer for Contactless Current Sensing. ISSCC 2021: 80-82 - [c223]Kyungmi Lee, Anantha P. Chandrakasan:
Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks. SiPS 2021: 46-51 - [c222]Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan:
150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications. VLSID 2021: 169-174 - [i16]Saurav Maji, Utsav Banerjee, Anantha P. Chandrakasan:
Leaky Nets: Recovering Embedded Neural Network Models and Inputs through Simple Power and Timing Side-Channels - Attacks and Defenses. CoRR abs/2103.14739 (2021) - [i15]Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi:
Does Fully Homomorphic Encryption Need Compute Acceleration? CoRR abs/2112.06396 (2021) - [i14]Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi:
Does Fully Homomorphic Encryption Need Compute Acceleration? IACR Cryptol. ePrint Arch. 2021: 1636 (2021) - 2020
- [c221]Zexi Ji, Wanyeong Jung, Jongchan Woo, Khushal Sethi, Shih-Lien Lu, Anantha P. Chandrakasan:
CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays. A-SSCC 2020: 1-4 - [c220]Taehoon Jeong, Anantha P. Chandrakasan, Hae-Seung Lee:
S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance. CICC 2020: 1-4 - [c219]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CICC 2020: 1-4 - [c218]Sirma Orguc, Joanna Sands, Atharva Sahasrabudhe, Polina Anikeeva, Anantha P. Chandrakasan:
Modular Optoelectronic System for Wireless, Programmable Neuromodulation During Free Behavior. EMBC 2020: 4322-4325 - [c217]Utsav Banerjee, Anantha P. Chandrakasan:
Efficient Post-Quantum TLS Handshakes using Identity-Based Key Exchange from Lattices. ICC 2020: 1-6 - [c216]Utsav Banerjee, Siddharth Das, Anantha P. Chandrakasan:
Accelerating Post-Quantum Cryptography using an Energy-Efficient TLS Crypto-Processor. ISCAS 2020: 1-5 - [c215]Mohamed I. Ibrahim, Muhammad Ibrahim Wasiq Khan, Wanyeong Jung, Rabia Tugce Yazicigil, Chiraag Shashikant Juvekar, Anantha P. Chandrakasan, Ruonan Han:
29.8 THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz. ISSCC 2020: 454-456 - [c214]Mohamed R. Abdelhamid, Ruicong Chen, Joonhyuk Cho, Anantha P. Chandrakasan, Fadel Adib:
Self-reconfigurable micro-implants for cross-tissue wireless and batteryless connectivity. MobiCom 2020: 59:1-59:14 - [i13]Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CoRR abs/2004.13709 (2020) - [i12]Kyungmi Lee, Anantha P. Chandrakasan:
Rethinking Empirical Evaluation of Adversarial Robustness Using First-Order Attack Methods. CoRR abs/2006.01304 (2020) - [i11]John Meklenburg, Michael A. Specter, Michael Wentz, Hari Balakrishnan, Anantha P. Chandrakasan, John Cohn, Gary Hatke, Louise Ivers, Ronald L. Rivest, Gerald Jay Sussman, Daniel J. Weitzner:
SonicPACT: An Ultrasonic Ranging Method for the Private Automated Contact Tracing (PACT) Protocol. CoRR abs/2012.04770 (2020)
2010 – 2019
- 2019
- [j148]Avishek Biswas, Anantha P. Chandrakasan:
CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks. IEEE J. Solid State Circuits 54(1): 217-230 (2019) - [j147]Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan:
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. IEEE J. Solid State Circuits 54(8): 2339-2352 (2019) - [j146]Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan:
Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2019(4): 17-61 (2019) - [c213]Miaorong Wang, Anantha P. Chandrakasan:
Flexible Low Power CNN Accelerator for Edge Computing with Weight Tuning. A-SSCC 2019: 209-212 - [c212]Utsav Banerjee, Abhishek Pathak, Anantha P. Chandrakasan:
An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things. ISSCC 2019: 46-48 - [c211]Aya G. Amer, Rebecca Ho, Gage Hills, Anantha P. Chandrakasan, Max M. Shulaker:
SHARC: Self-Healing Analog with RRAM and CNFETs. ISSCC 2019: 470-472 - [i10]Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan:
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications. CoRR abs/1903.04387 (2019) - [i9]Utsav Banerjee, Abhishek Pathak, Anantha P. Chandrakasan:
An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things. CoRR abs/1903.04570 (2019) - [i8]Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan:
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. CoRR abs/1907.04455 (2019) - [i7]Y. Yang, Ujwal Radhakrishna, D. Ward, Anantha P. Chandrakasan, Jeffrey H. Lang:
A Silicon MEMS EM vibration energy harvester. CoRR abs/1910.02131 (2019) - [i6]Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan:
Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols. CoRR abs/1910.07557 (2019) - [i5]Utsav Banerjee, Tenzin S. Ukyab, Anantha P. Chandrakasan:
Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols (Extended Version). IACR Cryptol. ePrint Arch. 2019: 1140 (2019) - 2018
- [j145]Michael Price, James R. Glass, Anantha P. Chandrakasan:
A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks. IEEE J. Solid State Circuits 53(1): 66-75 (2018) - [j144]Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan:
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation. IEEE J. Solid State Circuits 53(1): 236-246 (2018) - [j143]Mehul Tikekar, Vivienne Sze, Anantha P. Chandrakasan:
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. IEEE J. Solid State Circuits 53(8): 2368-2377 (2018) - [c210]Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee:
A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures. ASP-DAC 2018: 279-280 - [c209]Mohamed R. Abdelhamid, Arun Paidimarri, Anantha P. Chandrakasan:
A -80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency. CICC 2018: 1-4 - [c208]Ujwal Radhakrishna, Patrick Riehl, Nachiket V. Desai, Phillip M. Nadeau, Yuechen Yang, Abraham Shin, Jeffrey H. Lang, Anantha P. Chandrakasan:
A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion. CICC 2018: 1-4 - [c207]Sirma Orguc, Harneet Singh Khurana, Konstantina M. Stankovic, Hae-Seung Lee, Anantha P. Chandrakasan:
EMG-based Real Time Facial Gesture Recognition for Stress Monitoring. EMBC 2018: 2651-2654 - [c206]Skanda Koppula, James R. Glass, Anantha P. Chandrakasan:
Energy-Efficient Speaker Identification with Low-Precision Networks. ICASSP 2018: 2246-2250 - [c205]Harneet Singh Khurana, Anantha P. Chandrakasan, Hae-Seung Lee:
Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles. ISCAS 2018: 1-5 - [c204]Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan:
An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications. ISSCC 2018: 42-44 - [c203]Avishek Biswas, Anantha P. Chandrakasan:
Conv-RAM: An energy-efficient SRAM with embedded convolution computation for low-power CNN-based machine learning applications. ISSCC 2018: 488-490 - [c202]Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan:
GAZELLE: A Low Latency Framework for Secure Neural Network Inference. USENIX Security Symposium 2018: 1651-1669 - [i4]Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan:
Gazelle: A Low Latency Framework for Secure Neural Network Inference. CoRR abs/1801.05507 (2018) - [i3]Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan:
GAZELLE: A Low Latency Framework for Secure Neural Network Inference. IACR Cryptol. ePrint Arch. 2018: 73 (2018) - 2017
- [j142]Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan:
A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures. IEEE J. Solid State Circuits 52(1): 272-283 (2017) - [j141]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits 52(7): 1849-1862 (2017) - [j140]Chuhong Duan, Andreas J. Gotterba, Mahmut E. Sinangil, Anantha P. Chandrakasan:
Energy-Efficient Reconfigurable SRAM: Reducing Read Power Through Data Statistics. IEEE J. Solid State Circuits 52(10): 2703-2711 (2017) - [j139]Frank M. Yaul, Anantha P. Chandrakasan:
A Noise-Efficient 36 nV/ $\surd $ Hz Chopper Amplifier Using an Inverter-Based 0.2-V Supply Input Stage. IEEE J. Solid State Circuits 52(11): 3032-3042 (2017) - [j138]Arun Paidimarri, Anantha P. Chandrakasan:
A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power. IEEE J. Solid State Circuits 52(12): 3119-3131 (2017) - [j137]Georgios Angelopoulos, Arun Paidimarri, Muriel Médard, Anantha P. Chandrakasan:
A Random Linear Network Coding Accelerator in a 2.4GHz Transmitter for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2582-2590 (2017) - [j136]Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan:
Harnessing Partial Packets in Wireless Networks: Throughput and Energy Benefits. IEEE Trans. Wirel. Commun. 16(2): 694-704 (2017) - [c201]Avishek Biswas, Umut Arslan, Fatih Hamzaoglu, Anantha P. Chandrakasan:
An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS. CICC 2017: 1-4 - [c200]Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan:
Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems. DAC 2017: 87:1-87:6 - [c199]Preet Garcha, Dina El-Damak, Nachiket V. Desai, Jorge Troncoso, Erika Mazotti, Joyce Mullenix, Shaoping Tang, Django Trombley, Dennis Buss, Jeffrey H. Lang, Anantha P. Chandrakasan:
A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting. ESSCIRC 2017: 127-130 - [c198]Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan:
Single-BAW multi-channel transmitter with low power and fast start-up time. ESSCIRC 2017: 195-198 - [c197]Sirma Orguc, Harneet Singh Khurana, Hae-Seung Lee, Anantha P. Chandrakasan:
0.3 V ultra-low power sensor interface for EMG. ESSCIRC 2017: 219-222 - [c196]Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan:
eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things. GLOBECOM 2017: 1-6 - [c195]Anantha P. Chandrakasan, Boris Murmann:
Session 1 overview: Plenary Session. ISSCC 2017: 6-7 - [c194]Arun Paidimarri, Anantha P. Chandrakasan:
10.8 A Buck converter with 240pW quiescent power, 92% peak efficiency and a 2×106 dynamic range. ISSCC 2017: 192-193 - [c193]Michael Price, James R. Glass, Anantha P. Chandrakasan:
14.4 A scalable speech recognizer with deep-neural-network acoustic models and voice-activated power gating. ISSCC 2017: 244-245 - [c192]Phillip M. Nadeau, Mark Mimee, Sean Carim, Timothy K. Lu, Anantha P. Chandrakasan:
21.1 Nanowatt circuit interface to whole-cell bacterial sensors. ISSCC 2017: 352-353 - [c191]Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan:
21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation. ISSCC 2017: 366-367 - 2016
- [j135]Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan:
Towards High-Performance Bufferless NoCs with SCEPTER. IEEE Comput. Archit. Lett. 15(1): 62-65 (2016) - [j134]Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan:
Ultra Low-Energy Relaxation Oscillator With 230 fJ/cycle Efficiency. IEEE J. Solid State Circuits 51(4): 789-799 (2016) - [j133]Dina El-Damak, Anantha P. Chandrakasan:
A 10 nW-1µW Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting Applications. IEEE J. Solid State Circuits 51(4): 943-954 (2016) - [j132]Arun Paidimarri, Nathan Ickes, Anantha P. Chandrakasan:
A +10 dBm BLE Transmitter With Sub-400 pW Leakage for Ultra-Low Duty Cycles. IEEE J. Solid State Circuits 51(6): 1331-1346 (2016) - [j131]Arun Paidimarri, Danielle Griffith, Alice Wang, Gangadhar Burra, Anantha P. Chandrakasan:
An RC Oscillator With Comparator Offset Cancellation. IEEE J. Solid State Circuits 51(8): 1866-1877 (2016) - [c190]Gilad Yahalom, Stacy Ho, Alice Wang, Uming Ko, Anantha P. Chandrakasan:
Analog-digital partitioning and coupling in 3D-IC for RF applications. 3DIC 2016: 1-4 - [c189]Chuhong Duan, Andreas J. Gotterba, Mahmut E. Sinangil, Anantha P. Chandrakasan:
Reconfigurable, conditional pre-charge SRAM: Lowering read power by leveraging data statistics. A-SSCC 2016: 177-180 - [c188]Bhavya K. Daya, Li-Shiuan Peh, Anantha P. Chandrakasan:
Quest for high-performance bufferless NoCs with single-cycle express paths and self-learning throttling. DAC 2016: 36:1-36:6 - [c187]Sunghyun Park, Alice Wang, Uming Ko, Li-Shiuan Peh, Anantha P. Chandrakasan:
Enabling simultaneously bi-directional TSV signaling for energy and area efficient 3D-ICs. DATE 2016: 163-168 - [c186]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An energy-scalable accelerator for blind image deblurring. ESSCIRC 2016: 113-116 - [c185]Nachiket V. Desai, Anantha P. Chandrakasan:
A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging. ESSCIRC 2016: 313-316 - [c184]Avishek Biswas, Anantha P. Chandrakasan:
A 0.36V 128Kb 6T SRAM with energy-efficient dynamic body-biasing and output data prediction in 28nm FDSOI. ESSCIRC 2016: 433-436 - [c183]Michael Price, Anantha P. Chandrakasan, James R. Glass:
Memory-Efficient Modeling and Search Techniques for Hardware ASR Decoders. INTERSPEECH 2016: 1893-1897 - [c182]Anantha P. Chandrakasan, Kevin Zhang:
Session 1 overview: Plenary session. ISSCC 2016: 6-7 - [c181]Frank M. Yaul, Anantha P. Chandrakasan:
5.4 A sub-µW 36nV/√Hz chopper amplifier for sensors using a noise-efficient inverter-based 0.2V-supply input stage. ISSCC 2016: 94-95 - [c180]Chiraag Juvekar, Hyung-Min Lee, Joyce Kwong, Anantha P. Chandrakasan:
16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures. ISSCC 2016: 290-291 - [c179]Dongsuk Jeon, Nathan Ickes, Priyanka Raina, Hsueh-Cheng Wang, Daniela Rus, Anantha P. Chandrakasan:
24.1 A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired. ISSCC 2016: 416-417 - [c178]Bonnie Kit Ying Lam, Michael Price, Anantha P. Chandrakasan:
An ASIC for Energy-Scalable, Low-Power Digital Ultrasound Beamforming. SiPS 2016: 57-62 - 2015
- [j130]Michael Price, James R. Glass, Anantha P. Chandrakasan:
A 6 mW, 5, 000-Word Real-Time Speech Recognizer Using WFST Models. IEEE J. Solid State Circuits 50(1): 102-112 (2015) - [j129]Marcus Yip, Rui Jin, Hideko Heidi Nakajima, Konstantina M. Stankovic, Anantha P. Chandrakasan:
A Fully-Implantable Cochlear Implant SoC With Piezoelectric Middle-Ear Sensor and Arbitrary Waveform Neural Stimulation. IEEE J. Solid State Circuits 50(1): 214-229 (2015) - [j128]Avishek Biswas, Yildiz Sinangil, Anantha P. Chandrakasan:
A 28 nm FDSOI Integrated Reconfigurable Switched-Capacitor Based Step-Up DC-DC Converter With 88% Peak Efficiency. IEEE J. Solid State Circuits 50(7): 1540-1549 (2015) - [c177]Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan:
AdaptCast: An integrated source to transmission scheme for wireless sensor networks. ICC 2015: 2894-2899 - [c176]Arun Paidimarri, Nathan Ickes, Anantha P. Chandrakasan:
13.7 A +10dBm 2.4GHz transmitter with sub-400pW leakage and 43.7% system efficiency. ISSCC 2015: 1-3 - [c175]Anantha P. Chandrakasan, Hoi-Jun Yoo:
Session 1 overview: Plenary session. ISSCC 2015: 6-7 - [c174]Omid Abari, Deepak Vasisht, Dina Katabi, Anantha P. Chandrakasan:
Caraoke: An E-Toll Transponder Network for Smart Cities. SIGCOMM 2015: 297-310 - [c173]Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan:
4.2 pW timer for heavily duty-cycled systems. VLSIC 2015: 240- - [c172]Dina El-Damak, Anantha P. Chandrakasan:
Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power. VLSIC 2015: 280- - 2014
- [j127]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits 49(1): 61-72 (2014) - [j126]Mahmut E. Sinangil, Anantha P. Chandrakasan:
Application-Specific SRAM Design Using Output Prediction to Reduce Bit-Line Switching Activity and Statistically Gated Sense Amplifiers for Up to 1.9× Lower Energy/Access. IEEE J. Solid State Circuits 49(1): 107-117 (2014) - [j125]Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan:
A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-µm CMOS for Nonvolatile Processing in Digital Systems. IEEE J. Solid State Circuits 49(1): 202-211 (2014) - [j124]Patrick P. Mercier, Saurav Bandyopadhyay, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan:
A Sub-nW 2.4 GHz Transmitter for Low Data-Rate Sensing Applications. IEEE J. Solid State Circuits 49(7): 1463-1474 (2014) - [j123]Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan:
A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication. IEEE J. Solid State Circuits 49(9): 1995-2004 (2014) - [j122]Yildiz Sinangil, Anantha P. Chandrakasan:
A 128 Kbit SRAM With an Embedded Energy Monitoring Circuit and Sense-Amplifier Offset Compensation Using Body Biasing. IEEE J. Solid State Circuits 49(11): 2730-2739 (2014) - [j121]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Correction to "Reconfigurable Processor for Energy-Efficient Computational Photography". IEEE J. Solid State Circuits 49(11): 2740 (2014) - [j120]Saurav Bandyopadhyay, Patrick P. Mercier, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan:
A 1.1 nW Energy-Harvesting System with 544 pW Quiescent Power for Next-Generation Implants. IEEE J. Solid State Circuits 49(12): 2812-2824 (2014) - [j119]Frank M. Yaul, Anantha P. Chandrakasan:
A 10 bit SAR ADC With Data-Dependent Energy Reduction Using LSB-First Successive Approximation. IEEE J. Solid State Circuits 49(12): 2825-2834 (2014) - [j118]Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee:
A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration. IEEE J. Solid State Circuits 49(12): 2846-2856 (2014) - [j117]Chao-Tsung Huang, Mehul Tikekar, Anantha P. Chandrakasan:
Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1515-1525 (2014) - [c171]Georgios Angelopoulos, Anantha P. Chandrakasan, Muriel Médard:
Energy Savings via Harnessing Partial Packets in Body Area Networks. BODYNETS 2014 - [c170]Avishek Biswas, Yildiz Sinangil, Anantha P. Chandrakasan:
A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency. ESSCIRC 2014: 271-274 - [c169]Chia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha P. Chandrakasan, Li-Shiuan Peh:
SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnect. Hot Chips Symposium 2014: 1-20 - [c168]Georgios Angelopoulos, Anantha P. Chandrakasan, Muriel Médard:
PRAC: Exploiting partial packets without cross-layer or feedback information. ICC 2014: 5802-5807 - [c167]Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze, Anantha P. Chandrakasan:
Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. ICIP 2014: 2100-2104 - [c166]Bhavya K. Daya, Chia-Hsin Owen Chen, Suvinay Subramanian, Woo-Cheol Kwon, Sunghyun Park, Tushar Krishna, Jim Holt, Anantha P. Chandrakasan, Li-Shiuan Peh:
SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering. ISCA 2014: 25-36 - [c165]Nachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan:
A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting. ISLPED 2014: 221-226 - [c164]Frank M. Yaul, Anantha P. Chandrakasan:
11.3 A 10b 0.6nW SAR ADC with data-dependent energy savings using LSB-first successive approximation. ISSCC 2014: 198-199 - [c163]Marcus Yip, Rui Jin, Hideko Heidi Nakajima, Konstantina M. Stankovic, Anantha P. Chandrakasan:
18.2 A fully-implantable cochlear implant SoC with piezoelectric middle-ear sensor and energy-efficient stimulation in 0.18μm HVCMOS. ISSCC 2014: 312-313 - [c162]Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee:
22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration. ISSCC 2014: 384-385 - [c161]Saurav Bandyopadhyay, Patrick P. Mercier, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan:
23.2 A 1.1nW energy harvesting system with 544pW quiescent power for next-generation implants. ISSCC 2014: 396-397 - [c160]Michael Price, James R. Glass, Anantha P. Chandrakasan:
27.2 A 6mW 5K-Word real-time speech recognizer using WFST models. ISSCC 2014: 454-455 - [c159]Omid Abari, Ezzeldin Hamed, Haitham Hassanieh, Abhinav Agarwal, Dina Katabi, Anantha P. Chandrakasan, Vladimir Stojanovic:
27.4 A 0.75-million-point fourier-transform chip for frequency-sparse signals. ISSCC 2014: 458-459 - [c158]Yildiz Sinangil, Sabrina M. Neuman, Mahmut E. Sinangil, Nathan Ickes, George Bezerra, Eric Lau, Jason E. Miller, Henry Hoffmann, Srinivas Devadas, Anantha P. Chandrakasan:
A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation. VLSIC 2014: 1-2 - [p2]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
Decoder Hardware Architecture for HEVC. High Efficiency Video Coding 2014: 303-341 - 2013
- [j116]Tushar Krishna, Chia-Hsin Owen Chen, Sunghyun Park, Woo-Cheol Kwon, Suvinay Subramanian, Anantha P. Chandrakasan, Li-Shiuan Peh:
Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks. Computer 46(10): 48-55 (2013) - [j115]Jerald Yoo, Long Yan, Dina El-Damak, Muhammad Bin Altaf, Ali H. Shoeb, Anantha P. Chandrakasan:
An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor. IEEE J. Solid State Circuits 48(1): 214-228 (2013) - [j114]Arun Paidimarri, Phillip M. Nadeau, Patrick P. Mercier, Anantha P. Chandrakasan:
A 2.4 GHz Multi-Channel FBAR-based Transmitter With an Integrated Pulse-Shaping Power Amplifier. IEEE J. Solid State Circuits 48(4): 1042-1054 (2013) - [j113]Marcus Yip, Anantha P. Chandrakasan:
A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications. IEEE J. Solid State Circuits 48(6): 1453-1464 (2013) - [j112]Kailiang Chen, Hae-Seung Lee, Anantha P. Chandrakasan, Charles G. Sodini:
Ultrasonic Imaging Transceiver Design for CMUT: A Three-Level 30-Vpp Pulse-Shaping Pulser With Improved Efficiency and a Noise-Optimized Receiver. IEEE J. Solid State Circuits 48(11): 2734-2745 (2013) - [j111]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Reconfigurable Processor for Energy-Efficient Computational Photography. IEEE J. Solid State Circuits 48(11): 2908-2919 (2013) - [j110]Mahmut E. Sinangil, Vivienne Sze, Minhua Zhou, Anantha P. Chandrakasan:
Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard. IEEE J. Sel. Top. Signal Process. 7(6): 1017-1028 (2013) - [j109]Fred Chen, Fabian Lim, Omid Salehi-Abari, Anantha P. Chandrakasan, Vladimir Stojanovic:
Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(3): 650-661 (2013) - [j108]Patrick P. Mercier, Anantha P. Chandrakasan:
Rapid Wireless Capacitor Charging Using a Multi-Tapped Inductively-Coupled Secondary Coil. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(9): 2263-2272 (2013) - [j107]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Technique for Efficient Evaluation of SRAM Timing Failure. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1558-1562 (2013) - [c157]Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, Suvinay Subramanian, Anantha P. Chandrakasan, Li-Shiuan Peh:
SMART: a single-cycle reconfigurable NoC for SoC applications. DATE 2013: 338-343 - [c156]Sunghyun Park, Masood Qazi, Li-Shiuan Peh, Anantha P. Chandrakasan:
40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS. DATE 2013: 1637-1642 - [c155]Patrick P. Mercier, Saurav Bandyopadhyay, Andrew C. Lysaght, Konstantina M. Stankovic, Anantha P. Chandrakasan:
A 78 pW 1 b/s 2.4 GHz radio transmitter for near-zero-power sensing applications. ESSCIRC 2013: 133-136 - [c154]Georgios Angelopoulos, Arun Paidimarri, Anantha P. Chandrakasan, Muriel Médard:
Experimental study of the interplay of channel and network coding in low power sensor applications. ICC 2013: 5126-5130 - [c153]Anantha P. Chandrakasan, Bram Nauta:
Session 1 overview: Plenary session. ISSCC 2013: 6-7 - [c152]Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC 2013: 162-163 - [c151]Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan:
Reconfigurable processor for energy-scalable computational photography. ISSCC 2013: 164-165 - [c150]Arun Paidimarri, Danielle Griffith, Alice Wang, Anantha P. Chandrakasan, Gangadhar Burra:
A 120nW 18.5kHz RC oscillator with comparator offset cancellation for ±0.25% temperature stability. ISSCC 2013: 184-185 - [c149]Masood Qazi, Ajith Amerasekera, Anantha P. Chandrakasan:
A 3.4pJ FeRAM-enabled D flip-flop in 0.13µm CMOS for nonvolatile processing in digital systems. ISSCC 2013: 192-193 - [c148]Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan:
A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication. ISSCC 2013: 206-207 - [c147]Mahmut E. Sinangil, Anantha P. Chandrakasan:
An SRAM using output prediction to reduce BL-switching activity and statistically-gated SA for up to 1.9× reduction in energy/access. ISSCC 2013: 318-319 - [c146]Saurav Bandyopadhyay, Bob Neidorff, Dave Freeman, Anantha P. Chandrakasan:
90.6% efficient 11MHz 22W LED driver using GaN FETs and burst-mode controller with 0.96 power factor. ISSCC 2013: 368-369 - [c145]Dina El-Damak, Saurav Bandyopadhyay, Anantha P. Chandrakasan:
A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors. ISSCC 2013: 374-375 - [c144]Trudy Stetzler, Anantha P. Chandrakasan, Bram Nauta:
EP1: Antiques from the innovations attic. ISSCC 2013: 514 - [c143]Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan:
HEVC interpolation filter architecture for quad full HD decoding. VCIP 2013: 1-5 - 2012
- [j106]Benton H. Calhoun, Anantha P. Chandrakasan, Brian P. Otis, Naveen Verma, Hoi-Jun Yoo:
Guest Editorial Emerging Circuits and Systems Techniques for Ultra-Low Power Body Sensor Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(1): 1-3 (2012) - [j105]Vivienne Sze, Anantha P. Chandrakasan:
A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding. IEEE J. Solid State Circuits 47(1): 8-22 (2012) - [j104]Nathan Ickes, Gordon Gammie, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko:
A 28 nm 0.6 V Low Power DSP for Mobile Applications. IEEE J. Solid State Circuits 47(1): 35-46 (2012) - [j103]Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan:
A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin. IEEE J. Solid State Circuits 47(1): 141-150 (2012) - [j102]Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic:
Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors. IEEE J. Solid State Circuits 47(3): 744-756 (2012) - [j101]Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee:
A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC. IEEE J. Solid State Circuits 47(7): 1603-1614 (2012) - [j100]Saurav Bandyopadhyay, Anantha P. Chandrakasan:
Platform Architecture for Solar, Thermal, and Vibration Energy Combining With MPPT and Single Inductor. IEEE J. Solid State Circuits 47(9): 2199-2215 (2012) - [j99]Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan:
Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding. IEEE J. Solid State Circuits 47(11): 2724-2736 (2012) - [j98]Mahmut E. Sinangil, Marcus Yip, Masood Qazi, Rahul Rithe, Joyce Kwong, Anantha P. Chandrakasan:
Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems. IEEE Trans. Circuits Syst. II Express Briefs 59-II(9): 533-537 (2012) - [j97]Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan:
The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage. IEEE Trans. Very Large Scale Integr. Syst. 20(5): 911-924 (2012) - [j96]Vivienne Sze, Anantha P. Chandrakasan:
Joint Algorithm-Architecture Optimization of CABAC. J. Signal Process. Syst. 69(3): 239-252 (2012) - [c142]Henry Hoffmann, Jim Holt, George Kurian, Eric Lau, Martina Maggio, Jason E. Miller, Sabrina M. Neuman, Mahmut E. Sinangil, Yildiz Sinangil, Anant Agarwal, Anantha P. Chandrakasan, Srinivas Devadas:
Self-aware computing in the Angstrom processor. DAC 2012: 259-264 - [c141]Sunghyun Park, Tushar Krishna, Chia-Hsin Owen Chen, Bhavya K. Daya, Anantha P. Chandrakasan, Li-Shiuan Peh:
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI. DAC 2012: 398-405 - [c140]Mahmut E. Sinangil, Anantha P. Chandrakasan, Vivienne Sze, Minhua Zhou:
Hardware-aware motion estimation search algorithm development for high-efficiency video coding (HEVC) standard. ICIP 2012: 1529-1532 - [c139]Mahmut E. Sinangil, Anantha P. Chandrakasan, Vivienne Sze, Minhua Zhou:
Memory cost vs. coding efficiency trade-offs for HEVC motion estimation engine. ICIP 2012: 1533-1536 - [c138]Anantha P. Chandrakasan, Hideto Hidaka:
Session 1 overview: Plenary session. ISSCC 2012: 7-9 - [c137]Karthik Kadirvel, Yogesh K. Ramadass, Umar Lyles, John Carpenter, Vadim Ivanov, Vince McNeil, Anantha P. Chandrakasan, Brian Lum-Shue-Chan:
A 330nA energy-harvesting charger with battery management for solar and thermoelectric energy harvesting. ISSCC 2012: 106-108 - [c136]Jerald Yoo, Long Yan, Dina El-Damak, Muhammad Bin Altaf, Ali H. Shoeb, Hoi-Jun Yoo, Anantha P. Chandrakasan:
An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor. ISSCC 2012: 292-294 - [c135]Arun Paidimarri, Phillip M. Nadeau, Patrick P. Mercier, Anantha P. Chandrakasan:
A 440pJ/bit 1Mb/s 2.4GHz multi-channel FBAR-based TX and an integrated pulse-shaping PA. VLSIC 2012: 34-35 - [c134]Marcus Yip, Jose L. Bohorquez, Anantha P. Chandrakasan:
A 0.6V 2.9µW mixed-signal front-end for ECG monitoring. VLSIC 2012: 66-67 - 2011
- [j95]Masood Qazi, Mahmut E. Sinangil, Anantha P. Chandrakasan:
Challenges and Directions for Low-Voltage SRAM. IEEE Des. Test Comput. 28(1): 32-43 (2011) - [j94]Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan:
A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS. IEEE J. Solid State Circuits 46(1): 85-96 (2011) - [j93]Yogesh K. Ramadass, Anantha P. Chandrakasan:
A Battery-Less Thermoelectric Energy Harvesting Interface Circuit With 35 mV Startup Voltage. IEEE J. Solid State Circuits 46(1): 333-341 (2011) - [j92]Jose L. Bohorquez, Marcus Yip, Anantha P. Chandrakasan, Joel L. Dawson:
A Biomedical Sensor Interface With a sinc Filter and Interference Cancellation. IEEE J. Solid State Circuits 46(4): 746-756 (2011) - [j91]Patrick P. Mercier, Anantha P. Chandrakasan:
A Supply-Rail-Coupled eTextiles Transceiver for Body-Area Networks. IEEE J. Solid State Circuits 46(6): 1284-1295 (2011) - [j90]Joyce Kwong, Anantha P. Chandrakasan:
An Energy-Efficient Biomedical Signal Processing Platform. IEEE J. Solid State Circuits 46(7): 1742-1753 (2011) - [j89]Payam Lajevardi, Anantha P. Chandrakasan, Hae-Seung Lee:
Zero-Crossing Detector Based Reconfigurable Analog System. IEEE J. Solid State Circuits 46(11): 2478-2487 (2011) - [j88]Saurav Bandyopadhyay, Yogesh K. Ramadass, Anantha P. Chandrakasan:
20 µ A to 100 mA DC-DC Converter With 2.8-4.2 V Battery Supply for Portable Applications in 45 nm CMOS. IEEE J. Solid State Circuits 46(12): 2807-2820 (2011) - [j87]Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning, Devavrat Shah:
Reduction of Variation-Induced Energy Overhead in Multi-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6): 891-904 (2011) - [c133]Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan:
Quad Full-HD transform engine for dual-standard low-power video coding. A-SSCC 2011: 401-404 - [c132]Nathan Ickes, Yildiz Sinangil, Francesco Pappalardo, Elio Guidetti, Anantha P. Chandrakasan:
A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip. ESSCIRC 2011: 159-162 - [c131]Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee:
A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC. ESSCIRC 2011: 355-358 - [c130]Vivienne Sze, Anantha P. Chandrakasan:
Joint algorithm-architecture optimization of CABAC to increase speed and reduce area cost. ICASSP 2011: 1577-1580 - [c129]Vivienne Sze, Anantha P. Chandrakasan:
A highly parallel and scalable CABAC decoder for next generation video coding. ISSCC 2011: 126-128 - [c128]Gordon Gammie, Nathan Ickes, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko:
A 28nm 0.6V low-power DSP for mobile applications. ISSCC 2011: 132-134 - [c127]Marcus Yip, Anantha P. Chandrakasan:
A resolution-reconfigurable 5-to-10b 0.4-to-1V power scalable SAR ADC. ISSCC 2011: 190-192 - [c126]Masood Qazi, Michael Clinton, Steven Bartling, Anantha P. Chandrakasan:
A low-voltage 1Mb FeRAM in 0.13μm CMOS featuring time-to-digital sensing for expanded operating margin in scaled CMOS. ISSCC 2011: 208-210 - [c125]Mahmut E. Sinangil, Hugh Mair, Anantha P. Chandrakasan:
A 28nm high-density 6T SRAM with optimized peripheral-assist circuits for operation down to 0.6V. ISSCC 2011: 260-262 - [c124]Saurav Bandyopadhyay, Yogesh K. Ramadass, Anantha P. Chandrakasan:
20μA to 100mA DC-DC converter with 2.8 to 4.2V battery supply for portable applications in 45nm CMOS. ISSCC 2011: 386-388 - [c123]Georgios Angelopoulos, Muriel Médard, Anantha P. Chandrakasan:
Energy-Aware Hardware Implementation of Network Coding. Networking Workshops 2011: 137-144 - [c122]Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan:
Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations. VLSI Design 2011: 112-117 - 2010
- [j86]Denis C. Daly, Patrick P. Mercier, Manish Bhardwaj, Alice L. Stone, Zane N. Aldworth, Thomas L. Daniel, Joel Voldman, John G. Hildebrand, Anantha P. Chandrakasan:
A Pulsed UWB Receiver SoC for Insect Motion Control. IEEE J. Solid State Circuits 45(1): 153-166 (2010) - [j85]Yogesh K. Ramadass, Anantha P. Chandrakasan:
An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor. IEEE J. Solid State Circuits 45(1): 189-204 (2010) - [j84]Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning:
All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits. IEEE J. Solid State Circuits 45(3): 640-651 (2010) - [j83]Naveen Verma, Ali H. Shoeb, Jose L. Bohorquez, Joel L. Dawson, John V. Guttag, Anantha P. Chandrakasan:
A Micro-Power EEG Acquisition SoC With Integrated Feature Extraction Processor for a Chronic Seizure Detection System. IEEE J. Solid State Circuits 45(4): 804-816 (2010) - [j82]Patrick P. Mercier, Manish Bhardwaj, Denis C. Daly, Anantha P. Chandrakasan:
A Low-Voltage Energy-Sampling IR-UWB Digital Baseband Employing Quadratic Correlation. IEEE J. Solid State Circuits 45(6): 1209-1219 (2010) - [j81]Yogesh K. Ramadass, Ayman A. Fayed, Anantha P. Chandrakasan:
A Fully-Integrated Switched-Capacitor Step-Down DC-DC Converter With Digital Capacitance Modulation in 45 nm CMOS. IEEE J. Solid State Circuits 45(12): 2557-2565 (2010) - [j80]Anantha P. Chandrakasan, Denis C. Daly, Daniel F. Finchelstein, Joyce Kwong, Yogesh K. Ramadass, Mahmut E. Sinangil, Vivienne Sze, Naveen Verma:
Technologies for Ultradynamic Voltage Scaling. Proc. IEEE 98(2): 191-214 (2010) - [c121]Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic:
A signal-agnostic compressed sensing acquisition system for wireless and implantable sensors. CICC 2010: 1-4 - [c120]Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic:
A low-power area-efficient switching scheme for charge-sharing DACs in SAR ADCs. CICC 2010: 1-4 - [c119]Chih-Chi Cheng, Yi-Min Tsai, Liang-Gee Chen, Anantha P. Chandrakasan:
A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine. CICC 2010: 1-4 - [c118]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. DATE 2010: 801-806 - [c117]Rahul Rithe, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan:
Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage. DATE 2010: 965-968 - [c116]Joyce Kwong, Anantha P. Chandrakasan:
An energy-efficient biomedical signal processing platform. ESSCIRC 2010: 526-529 - [c115]Yogesh K. Ramadass, Ayman A. Fayed, Baher Haroun, Anantha P. Chandrakasan:
A 0.16mm2 completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS. ISSCC 2010: 208-209 - [c114]Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan:
A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS. ISSCC 2010: 350-351 - [c113]Yogesh K. Ramadass, Anantha P. Chandrakasan:
A batteryless thermoelectric energy-harvesting interface circuit with 35mV startup voltage. ISSCC 2010: 486-487 - [c112]Patrick P. Mercier, Anantha P. Chandrakasan:
A 110µW 10Mb/s etextiles transceiver for body area networks with remote battery power. ISSCC 2010: 496-497
2000 – 2009
- 2009
- [j79]Joyce Kwong, Yogesh K. Ramadass, Naveen Verma, Anantha P. Chandrakasan:
A 65 nm Sub-Vt Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter. IEEE J. Solid State Circuits 44(1): 115-126 (2009) - [j78]Naveen Verma, Anantha P. Chandrakasan:
A High-Density 45 nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing. IEEE J. Solid State Circuits 44(1): 163-173 (2009) - [j77]Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan:
A 32-µW 1.83-kS/s Carbon Nanotube Chemical Sensor System. IEEE J. Solid State Circuits 44(2): 659-669 (2009) - [j76]Jose L. Bohorquez, Anantha P. Chandrakasan, Joel L. Dawson:
A 350 µW CMOS MSK Transmitter and 400 µW OOK Super-Regenerative Receiver for Medical Implant Communications. IEEE J. Solid State Circuits 44(4): 1248-1259 (2009) - [j75]Patrick P. Mercier, Denis C. Daly, Anantha P. Chandrakasan:
An Energy-Efficient All-Digital UWB Transmitter Employing Dual Capacitively-Coupled Pulse-Shaping Drivers. IEEE J. Solid State Circuits 44(6): 1679-1688 (2009) - [j74]Vivienne Sze, Daniel F. Finchelstein, Mahmut E. Sinangil, Anantha P. Chandrakasan:
A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder. IEEE J. Solid State Circuits 44(11): 2943-2956 (2009) - [j73]Denis C. Daly, Anantha P. Chandrakasan:
A 6-bit, 0.2 V to 0.9 V Highly Digital Flash ADC With Comparator Redundancy. IEEE J. Solid State Circuits 44(11): 3030-3038 (2009) - [j72]Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan:
A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65 nm CMOS. IEEE J. Solid State Circuits 44(11): 3163-3173 (2009) - [j71]Anantha P. Chandrakasan, Fred S. Lee, David D. Wentzloff, Vivienne Sze, Brian P. Ginsburg, Patrick P. Mercier, Denis C. Daly, Raúl Blázquez:
Low-Power Impulse UWB Architectures and Circuits. Proc. IEEE 97(2): 332-352 (2009) - [j70]Daniel F. Finchelstein, Vivienne Sze, Anantha P. Chandrakasan:
Multicore Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders. IEEE Trans. Circuits Syst. Video Technol. 19(11): 1704-1713 (2009) - [c111]Fred Chen, Anantha P. Chandrakasan, Vladimir Stojanovic:
An oscilloscope array for high-impedance device characterization. ESSCIRC 2009: 112-115 - [c110]Vivienne Sze, Anantha P. Chandrakasan:
A high throughput CABAC algorithm using syntax element partitioning. ICIP 2009: 773-776 - [c109]Denis C. Daly, Patrick P. Mercier, Manish Bhardwaj, Alice L. Stone, Joel Voldman, Richard B. Levine, John G. Hildebrand, Anantha P. Chandrakasan:
A pulsed UWB receiver SoC for insect motion control. ISSCC 2009: 200-201 - [c108]Patrick P. Mercier, Manish Bhardwaj, Denis C. Daly, Anantha P. Chandrakasan:
A 0.55V 16Mb/s 1.6mW non-coherent IR-UWB digital baseband with ±1ns synchronization accuracy. ISSCC 2009: 252-253 - [c107]Yogesh K. Ramadass, Anantha P. Chandrakasan:
An efficient piezoelectric energy-harvesting interface circuit using a bias-flip rectifier and shared inductor. ISSCC 2009: 296-297 - [c106]Anantha P. Chandrakasan:
Next generation energy scavenging systems. ISSCC 2009: 519 - 2008
- [j69]Naveen Verma, Anantha P. Chandrakasan:
A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy. IEEE J. Solid State Circuits 43(1): 141-149 (2008) - [j68]Yogesh K. Ramadass, Anantha P. Chandrakasan:
Minimum Energy Tracking Loop With Embedded DC-DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS. IEEE J. Solid State Circuits 43(1): 256-265 (2008) - [j67]Brian P. Ginsburg, Anantha P. Chandrakasan:
Highly Interleaved 5-bit, 250-MSample/s, 1.2-mW ADC With Redundant Channels in 65-nm CMOS. IEEE J. Solid State Circuits 43(12): 2641-2650 (2008) - [j66]Curt Schurgers, Anantha P. Chandrakasan:
Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms. J. Signal Process. Syst. 53(3): 231-241 (2008) - [c105]Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan:
The design of a low power carbon nanotube chemical sensor system. DAC 2008: 84-89 - [c104]Brian P. Ginsburg, Anantha P. Chandrakasan:
The mixed signal optimum energy point: voltage and parallelism. DAC 2008: 244-249 - [c103]Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan:
A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz. ESSCIRC 2008: 282-285 - [c102]Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha P. Chandrakasan:
Breaking the simulation barrier: SRAM evaluation through norm minimization. ICCAD 2008: 322-329 - [c101]Vivienne Sze, Anantha P. Chandrakasan, Madhukar Budagavi, Minhua Zhou:
Parallel CABAC for low power video coding. ICIP 2008: 2096-2099 - [c100]Patrick P. Mercier, Denis C. Daly, Manish Bhardwaj, David D. Wentzloff, Fred S. Lee, Anantha P. Chandrakasan:
Ultra-low-power UWB for sensor network applications. ISCAS 2008: 2562-2565 - [c99]Brian P. Ginsburg, Anantha P. Chandrakasan:
Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS. ISSCC 2008: 240-241 - [c98]Joyce Kwong, Yogesh K. Ramadass, Naveen Verma, Markus Koesler, Korbinian Huber, Hans Moormann, Anantha P. Chandrakasan:
A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter. ISSCC 2008: 318-319 - [c97]Naveen Verma, Anantha P. Chandrakasan:
A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing. ISSCC 2008: 380-381 - [c96]Denis C. Daly, Anantha P. Chandrakasan:
A 6b 0.2-to-0.9V Highly Digital Flash ADC with Comparator Redundancy. ISSCC 2008: 554-555 - 2007
- [j65]Brian P. Ginsburg, Anantha P. Chandrakasan:
Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver. IEEE J. Solid State Circuits 42(2): 247-257 (2007) - [j64]Benton H. Calhoun, Anantha P. Chandrakasan:
A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation. IEEE J. Solid State Circuits 42(3): 680-688 (2007) - [j63]Brian P. Ginsburg, Anantha P. Chandrakasan:
500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC. IEEE J. Solid State Circuits 42(4): 739-747 (2007) - [j62]Denis C. Daly, Anantha P. Chandrakasan:
An Energy-Efficient OOK Transceiver for Wireless Sensor Networks. IEEE J. Solid State Circuits 42(5): 1003-1011 (2007) - [j61]Naveen Verma, Anantha P. Chandrakasan:
An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes. IEEE J. Solid State Circuits 42(6): 1196-1205 (2007) - [j60]Fred S. Lee, Anantha P. Chandrakasan:
A 2.5 nJ/bit 0.65 V Pulsed UWB Receiver in 90 nm CMOS. IEEE J. Solid State Circuits 42(12): 2851-2859 (2007) - [c95]Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong, Anantha P. Chandrakasan:
A Low Power Carbon Nanotube Chemical Sensor System. CICC 2007: 181-184 - [c94]David D. Wentzloff, Anantha P. Chandrakasan:
Delay-Based BPSK for Pulsed-UWB Communication. ICASSP (3) 2007: 561-564 - [c93]Vivienne Sze, Anantha P. Chandrakasan:
A 0.4-V UWB baseband processor. ISLPED 2007: 262-267 - [c92]Nigel Drego, Anantha P. Chandrakasan, Duane S. Boning:
A Test-Structure to Efficiently Study Threshold-Voltage Variation in Large MOSFET Arrays. ISQED 2007: 281-286 - [c91]Yogesh K. Ramadass, Anantha P. Chandrakasan:
Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages down to 250mV in 65nm CMOS. ISSCC 2007: 64-587 - [c90]Fred S. Lee, Anantha P. Chandrakasan:
A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS. ISSCC 2007: 116-590 - [c89]David D. Wentzloff, Anantha P. Chandrakasan:
A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS. ISSCC 2007: 118-591 - [c88]Naveen Verma, Anantha P. Chandrakasan:
A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy. ISSCC 2007: 328-606 - [c87]Fred Chen, Ajay Joshi, Vladimir Stojanovic, Anantha P. Chandrakasan:
Scaling and evaluation of carbon nanotube interconnects for VLSI applications. Nano-Net 2007: 24 - [i2]Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene:
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. CoRR abs/0710.4732 (2007) - [i1]Raúl Blázquez, Fred S. Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan:
Direct Conversion Pulsed UWB Transceiver Architecture. CoRR abs/0710.4815 (2007) - 2006
- [b1]Alice Wang, Benton H. Calhoun, Anantha P. Chandrakasan:
Sub-threshold Design for Ultra Low-Power Systems. Series on Integrated Circuits and Systems, Springer 2006, ISBN 978-0-387-33515-5, pp. 1-209 - [j59]Benton H. Calhoun, Anantha P. Chandrakasan:
Ultra-dynamic Voltage scaling (UDVS) using sub-threshold operation and local Voltage dithering. IEEE J. Solid State Circuits 41(1): 238-245 (2006) - [j58]Benton H. Calhoun, Anantha P. Chandrakasan:
Static noise margin variation for sub-threshold SRAM in 65-nm CMOS. IEEE J. Solid State Circuits 41(7): 1673-1679 (2006) - [j57]Fred S. Lee, Anantha P. Chandrakasan:
A BiCMOS Ultra-Wideband 3.1-10.6-GHz Front-End. IEEE J. Solid State Circuits 41(8): 1784-1791 (2006) - [j56]Kush Gulati, Mark Peng, Anurag Pulincherry, Carlos E. Muñoz, Mike Lugin, Alex R. Bugeja, Jipeng Li, Anantha P. Chandrakasan:
A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs. IEEE J. Solid State Circuits 41(8): 1856-1866 (2006) - [c86]Vivienne Sze, Raúl Blázquez, Manish Bhardwaj, Anantha P. Chandrakasan:
An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications. ICASSP (3) 2006: 908-911 - [c85]Joyce Kwong, Anantha P. Chandrakasan:
Variation-driven device sizing for minimum energy sub-threshold circuits. ISLPED 2006: 8-13 - [c84]Benton H. Calhoun, Alice Wang, Naveen Verma, Anantha P. Chandrakasan:
Sub-threshold design: the challenges of minimizing circuit energy. ISLPED 2006: 366-368 - [c83]Naveen Verma, Anantha P. Chandrakasan:
A 25µW 100kS/s 12b ADC for wireless micro-sensor applications. ISSCC 2006: 822-831 - [c82]Benton H. Calhoun, Anantha P. Chandrakasan:
A 256kb Sub-threshold SRAM in 65nm CMOS. ISSCC 2006: 2592-2601 - 2005
- [j55]David D. Wentzloff, Raúl Blázquez, Fred S. Lee, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan:
System design considerations for ultra-wideband communication. IEEE Commun. Mag. 43(8): 114-121 (2005) - [j54]Georgios K. Konstadinidis, Anantha P. Chandrakasan, Sreedhar Natarajan, Thucydides Xanthopoulos:
Introduction to the Special Issue on the ISSCC2004. IEEE J. Solid State Circuits 40(1): 3-6 (2005) - [j53]Alice Wang, Anantha P. Chandrakasan:
A 180-mV subthreshold FFT processor using a minimum energy design methodology. IEEE J. Solid State Circuits 40(1): 310-319 (2005) - [j52]Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan:
Modeling and sizing for minimum energy operation in subthreshold circuits. IEEE J. Solid State Circuits 40(9): 1778-1786 (2005) - [j51]Raúl Blázquez, Puneet P. Newaskar, Fred S. Lee, Anantha P. Chandrakasan:
A baseband processor for impulse ultra-wideband communications. IEEE J. Solid State Circuits 40(9): 1821-1828 (2005) - [j50]Rajeevan Amirtharajah, Jamie Collier, Jeff Siebert, Bicky Zhou, Anantha P. Chandrakasan:
DSPs for energy harvesting sensors: applications and architectures. IEEE Pervasive Comput. 4(3): 72-79 (2005) - [j49]Benton H. Calhoun, Denis C. Daly, Naveen Verma, Daniel F. Finchelstein, David D. Wentzloff, Alice Wang, Seong-Hwan Cho, Anantha P. Chandrakasan:
Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes. IEEE Trans. Computers 54(6): 727-740 (2005) - [j48]Puneet P. Newaskar, Raúl Blázquez, Anantha P. Chandrakasan:
A/D Precision Requirements for Digital Ultra-Wideband Radio Receivers. J. VLSI Signal Process. 39(1-2): 175-188 (2005) - [c81]Fred S. Lee, Anantha P. Chandrakasan:
A BiCMOS ultra-wideband 3.1-10.6GHz front-end. CICC 2005: 153-156 - [c80]Brian P. Ginsburg, Anantha P. Chandrakasan:
Dual scalable 500MS/s, 5b time-interleaved SAR ADCs for UWB applications. CICC 2005: 403-406 - [c79]Nisha Checka, Anantha P. Chandrakasan, Rafael Reif:
Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL. CICC 2005: 473-476 - [c78]Kush Gulati, Mark Peng, Anurag Pulincherry, Carlos E. Muñoz, Mike Lugin, Alex R. Bugeja, Jipeng Li, Anantha P. Chandrakasan:
A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs. CICC 2005: 515-518 - [c77]Raúl Blázquez, Fred S. Lee, David D. Wentzloff, Brian P. Ginsburg, Johnna Powell, Anantha P. Chandrakasan:
Direct Conversion Pulsed UWB Transceiver Architecture. DATE 2005: 94-95 - [c76]Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene:
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. DATE 2005: 196-201 - [c75]Benton H. Calhoun, Anantha P. Chandrakasan:
Analyzing static noise margin for sub-threshold SRAM in 65nm CMOS. ESSCIRC 2005: 363-366 - [c74]Raúl Blázquez, Anantha P. Chandrakasan:
Architectures for energy-aware impulse UWB communications. ICASSP (5) 2005: 789-792 - [c73]Brian P. Ginsburg, Anantha P. Chandrakasan:
An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. ISCAS (1) 2005: 184-187 - [c72]Young-Su Kwon, Payam Lajevardi, Anantha P. Chandrakasan, Frank Honoré, Donald E. Troxel:
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool. SLIP 2005: 65-72 - 2004
- [j47]Rajeevan Amirtharajah, Anantha P. Chandrakasan:
A micropower programmable DSP using approximate signal processing based on distributed arithmetic. IEEE J. Solid State Circuits 39(2): 337-347 (2004) - [j46]Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan:
Full-chip subthreshold leakage power prediction and reduction techniques for sub-0.18-μm CMOS. IEEE J. Solid State Circuits 39(3): 501-510 (2004) - [j45]Benton H. Calhoun, Frank Honoré, Anantha P. Chandrakasan:
A leakage reduction methodology for distributed MTCMOS. IEEE J. Solid State Circuits 39(5): 818-826 (2004) - [j44]Benton H. Calhoun, Anantha P. Chandrakasan:
Standby power reduction using dynamic voltage scaling and canary flip-flop structures. IEEE J. Solid State Circuits 39(9): 1504-1511 (2004) - [j43]Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Calibration of Rent's rule models for three-dimensional integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 12(4): 359-366 (2004) - [j42]Eugene Shih, Seong-Hwan Cho, Fred S. Lee, Benton H. Calhoun, Anantha P. Chandrakasan:
Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks. J. VLSI Signal Process. 37(1): 77-94 (2004) - [c71]Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan:
Device sizing for minimum energy operation in subthreshold circuits. CICC 2004: 95-98 - [c70]Raúl Blázquez, Puneet P. Newaskar, Fred S. Lee, Anantha P. Chandrakasan:
A baseband processor for pulsed ultra-wideband signals. CICC 2004: 587-590 - [c69]Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Timing, energy, and thermal performance of three-dimensional integrated circuits. ACM Great Lakes Symposium on VLSI 2004: 338-343 - [c68]Curt Schurgers, Anantha P. Chandrakasan:
Traceback-enhanced MAP decoding algorithm. ICASSP (4) 2004: 645-648 - [c67]Benton H. Calhoun, Anantha P. Chandrakasan:
Characterizing and modeling minimum energy operation for subthreshold circuits. ISLPED 2004: 90-95 - [c66]David D. Wentzloff, Benton H. Calhoun, Rex Min, Alice Wang, Nathan Ickes, Anantha P. Chandrakasan:
Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes. VLSI Design 2004: 361- - [p1]Anantha P. Chandrakasan, Amit Sinha:
Dynamic Power Management in Sensor Networks. Handbook of Sensor Networks 2004 - 2003
- [j41]Rex Min, Anantha P. Chandrakasan:
MobiCom poster: top five myths about the energy consumption of wireless communication. ACM SIGMOBILE Mob. Comput. Commun. Rev. 7(1): 65-67 (2003) - [j40]Paul-Peter Sotiriadis, Vahid Tarokh, Anantha P. Chandrakasan:
Energy reduction in VLSI computation modules: an information-theoretic approach. IEEE Trans. Inf. Theory 49(4): 790-808 (2003) - [j39]Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Wiring requirement and three-dimensional integration technology for field programmable gate arrays. IEEE Trans. Very Large Scale Integr. Syst. 11(1): 44-54 (2003) - [j38]Amit Sinha, Nathan Ickes, Anantha P. Chandrakasan:
Instruction level and operating system profiling for energy exposed software. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1044-1057 (2003) - [c65]Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Design tools for 3-D integrated circuits. ASP-DAC 2003: 53-56 - [c64]Benton H. Calhoun, Anantha P. Chandrakasan:
Standby voltage scaling for reduced power. CICC 2003: 639-642 - [c63]Twan Basten, Luca Benini, Anantha P. Chandrakasan, Menno Lindwer, Jie Liu, Rex Min, Feng Zhao:
Scaling into Ambient Intelligence. DATE 2003: 10076-10083 - [c62]Frank Honoré, Benton H. Calhoun, Anantha P. Chandrakasan:
Power-aware architectures and circuits for FPGA-based signal processing. FPGA 2003: 244 - [c61]Raúl Blázquez, Puneet P. Newaskar, Anantha P. Chandrakasan:
Coarse acquisition for ultra wideband digital receivers. ICASSP (4) 2003: 137-140 - [c60]Benton H. Calhoun, Frank Honoré, Anantha P. Chandrakasan:
Design methodology for fine-grained leakage control in MTCMOS. ISLPED 2003: 104-109 - [c59]Alice Wang, Anantha P. Chandrakasan:
Energy-aware architectures for a real-valued FFT implementation. ISLPED 2003: 360-365 - [c58]Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools. ISVLSI 2003: 13-18 - 2002
- [j37]Paul-Peter Sotiriadis, Anantha P. Chandrakasan:
Power Estimation and Power Optimal Communication in Deep Submicron Buses: Analytical Models and Statistical Measures. J. Circuits Syst. Comput. 11(6): 637-658 (2002) - [j36]James W. Tschanz, James T. Kao, Siva G. Narendra, Raj Nair, Dimitri A. Antoniadis, Anantha P. Chandrakasan, Vivek De:
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage. IEEE J. Solid State Circuits 37(11): 1396-1402 (2002) - [j35]James T. Kao, Masayuki Miyazaki, Anantha P. Chandrakasan:
A 175-MV multiply-accumulate unit using an adaptive supply voltage and body bias architecture. IEEE J. Solid State Circuits 37(11): 1545-1554 (2002) - [j34]Alice Wang, Anantha P. Chandrakasan:
Energy-efficient DSPs for wireless sensor networks. IEEE Signal Process. Mag. 19(4): 68-78 (2002) - [j33]Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Energy scalable system design. IEEE Trans. Very Large Scale Integr. Syst. 10(2): 135-145 (2002) - [j32]Paul-Peter Sotiriadis, Anantha P. Chandrakasan:
A bus energy model for deep submicron technology. IEEE Trans. Very Large Scale Integr. Syst. 10(3): 341-350 (2002) - [j31]Wendi B. Heinzelman, Anantha P. Chandrakasan, Hari Balakrishnan:
An application-specific protocol architecture for wireless microsensor networks. IEEE Trans. Wirel. Commun. 1(4): 660-670 (2002) - [j30]Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Nathan Ickes, Eugene Shih, Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Energy-centric enabling tecumologies for wireless sensor networks. IEEE Wirel. Commun. 9(4): 28-39 (2002) - [c57]James T. Kao, Siva G. Narendra, Anantha P. Chandrakasan:
Subthreshold leakage modeling and reduction techniques. ICCAD 2002: 141-148 - [c56]Manish Bhardwaj, Anantha P. Chandrakasan:
Bounding the Lifetime of Sensor Networks Via Optimal Role Assignments. INFOCOM 2002: 1587-1596 - [c55]Paul-Peter Sotiriadis, Anantha P. Chandrakasan, Vahid Tarokh:
Maximum achievable energy reduction using coding with applications to deep sub-micron buses. ISCAS (1) 2002: 85-88 - [c54]Siva G. Narendra, Vivek De, Shekhar Borkar, Dimitri A. Antoniadis, Anantha P. Chandrakasan:
Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. ISLPED 2002: 19-23 - [c53]Rex Min, Anantha P. Chandrakasan:
A framework for energy-scalable communication in high-density wireless networks. ISLPED 2002: 36-41 - [c52]Alice Wang, Anantha P. Chandrakasan, Stephen V. Kosonocky:
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits. ISVLSI 2002: 7-14 - 2001
- [j29]Amit Sinha, Anantha P. Chandrakasan:
Dynamic Power Management in Wireless Sensor Networks. IEEE Des. Test Comput. 18(2): 62-74 (2001) - [j28]James Goodman, Anantha P. Chandrakasan:
An energy-efficient reconfigurable public-key cryptography processor. IEEE J. Solid State Circuits 36(11): 1808-1820 (2001) - [j27]Scott E. Meninger, José Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang:
Vibration-to-electric energy conversion. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 64-76 (2001) - [j26]Manish Bhardwaj, Rex Min, Anantha P. Chandrakasan:
Quantifying and enhancing power awareness of VLSI systems. IEEE Trans. Very Large Scale Integr. Syst. 9(6): 757-772 (2001) - [j25]Alice Wang, Wendi B. Heinzelman, Amit Sinha, Anantha P. Chandrakasan:
Energy-Scalable Protocols for Battery-Operated MicroSensor Networks. J. VLSI Signal Process. 29(3): 223-237 (2001) - [c51]Paul-Peter Sotiriadis, Anantha P. Chandrakasan:
Reducing bus delay in submicron technology using coding. ASP-DAC 2001: 109-114 - [c50]Amit Sinha, Anantha P. Chandrakasan:
JouleTrack - A Web Based Tool for Software Energy Profiling. DAC 2001: 220-225 - [c49]Alice Wang, Anantha P. Chandrakasan:
Energy efficient system partitioning for distributed wireless sensor networks. ICASSP 2001: 905-908 - [c48]Seong-Hwan Cho, Anantha P. Chandrakasan:
Energy efficient protocols for low duty cycle wireless microsensor networks. ICASSP 2001: 2041-2044 - [c47]Manish Bhardwaj, Timothy Garnett, Anantha P. Chandrakasan:
Upper bounds on the lifetime of sensor networks. ICC 2001: 785-790 - [c46]Amit Sinha, Anantha P. Chandrakasan:
Energy Efficient Real-Time Scheduling. ICCAD 2001: 458-470 - [c45]Andrew Y. Wang, Seong-Hwan Cho, Charles G. Sodini, Anantha P. Chandrakasan:
Energy efficient Modulation and MAC for Asymmetric RF Microsensor Systems. ISLPED 2001: 106-111 - [c44]Siva G. Narendra, Vivek De, Dimitri A. Antoniadis, Anantha P. Chandrakasan, Shekhar Borkar:
Scaling of stack effect and its application for leakage reduction. ISLPED 2001: 195-200 - [c43]Paul-Peter Sotiriadis, Theodoros Konstantakopoulos, Anantha P. Chandrakasan:
Analysis and implementation of charge recycling for deep sub-micron buses. ISLPED 2001: 364-369 - [c42]CheeWe Ng, Anantha P. Chandrakasan:
Design of a power-scalable digital least-means-square adaptive filter. ISSPA 2001: 292-295 - [c41]Amit Sinha, Anantha P. Chandrakasan:
Operating System and Algorithmic Techniques for Energy Scalable Wireless Sensor Networks. Mobile Data Management 2001: 199-209 - [c40]Eugene Shih, Seong-Hwan Cho, Nathan Ickes, Rex Min, Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Physical layer driven protocol and algorithm design for energy-efficient wireless sensor networks. MobiCom 2001: 272-287 - [c39]Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif:
Wiring requirement and three-dimensional integration of field-programmable gate arrays. SLIP 2001: 107-113 - [c38]Rex Min, Manish Bhardwaj, Seong-Hwan Cho, Eugene Shih, Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Low-Power Wireless Sensor Networks. VLSI Design 2001: 205-210 - [c37]Amit Sinha, Anantha P. Chandrakasan:
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces. VLSI Design 2001: 221-226 - 2000
- [j24]Thomas Simon, Anantha P. Chandrakasan:
An ultra low power adaptive wavelet video encoder with integrated memory. IEEE J. Solid State Circuits 35(4): 572-582 (2000) - [j23]Thucydides Xanthopoulos, Anantha P. Chandrakasan:
A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization. IEEE J. Solid State Circuits 35(5): 740-750 (2000) - [j22]James T. Kao, Anantha P. Chandrakasan:
Dual-threshold voltage techniques for low-power digital circuits. IEEE J. Solid State Circuits 35(7): 1009-1018 (2000) - [j21]Vadim Gutnik, Anantha P. Chandrakasan:
Active GHz clock network using distributed PLLs. IEEE J. Solid State Circuits 35(11): 1553-1560 (2000) - [j20]Anantha P. Chandrakasan:
Special issue on low-power RF systems. Proc. IEEE 88(10): 1525-1527 (2000) - [j19]Abram P. Dancy, Rajeevan Amirtharajah, Anantha P. Chandrakasan:
High-efficiency multiple-output DC-DC conversion for low-voltage systems. IEEE Trans. Very Large Scale Integr. Syst. 8(3): 252-263 (2000) - [c36]James Goodman, Anantha P. Chandrakasan:
An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture. CHES 2000: 175-190 - [c35]Paul P. Sotiriadis, Anantha P. Chandrakasan:
Low power bus coding techniques considering inter-wire capacitances. CICC 2000: 507-510 - [c34]Vikas Mehrotra, Shiou Lin Sam, Duane S. Boning, Anantha P. Chandrakasan, Rakesh Vallishayee, Sani R. Nassif:
A methodology for modeling the effects of systematic within-die interconnect and device variation on circuit performance. DAC 2000: 172-175 - [c33]Wendi Rabiner Heinzelman, Anantha P. Chandrakasan, Hari Balakrishnan:
Energy-Efficient Communication Protocol for Wireless Microsensor Networks. HICSS 2000 - [c32]Wendi Rabiner Heinzelman, Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Energy-scalable algorithms and protocols for wireless microsensor networks. ICASSP 2000: 3722-3725 - [c31]Paul-Peter Sotiriadis, Anantha P. Chandrakasan:
Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies. ICCAD 2000: 322-327 - [c30]Hemang Lavana, Franc Brglez, Robert B. Reese, Gangadhar Konduri, Anantha P. Chandrakasan:
OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet. ICCD 2000: 567-570 - [c29]Amit Sinha, Alice Wang, Anantha P. Chandrakasan:
Algorithmic transforms for efficient energy scalable computation. ISLPED 2000: 31-36 - [c28]Amit Sinha, Anantha P. Chandrakasan:
Energy Aware Software. VLSI Design 2000: 50-
1990 – 1999
- 1999
- [j18]Thucydides Xanthopoulos, Anantha P. Chandrakasan:
A low-power IDCT macrocell for MPEG-2 MP@ML exploiting data distribution properties for minimal activity. IEEE J. Solid State Circuits 34(5): 693-703 (1999) - [j17]Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan:
A low power variable length decoder for MPEG-2 based on nonuniform fine-grain table partitioning. IEEE Trans. Very Large Scale Integr. Syst. 7(2): 249-257 (1999) - [c27]Anantha P. Chandrakasan, Raj Amirtharajah, Seong-Hwan Cho, James Goodman, Gangadhar Konduri, Joanna Kulik, W. Rabiner, Alice Wang:
Design considerations for distributed microsensor systems. CICC 1999: 279-286 - [c26]James Goodman, Anantha P. Chandrakasan, Abram P. Dancy:
Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter. DAC 1999: 855-860 - [c25]Gangadhar Konduri, Anantha P. Chandrakasan:
A Framework for Collaborative and Distributed Web-Based Design. DAC 1999: 898-903 - [c24]Gangadhar Konduri, James Goodman, Anantha P. Chandrakasan:
Energy efficient software through dynamic voltage scheduling. ISCAS (1) 1999: 358-361 - [c23]Scott E. Meninger, José Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang:
Vibration-to-electric energy conversion. ISLPED 1999: 48-53 - [c22]Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha P. Chandrakasan:
Power scalable processing using distributed arithmetic. ISLPED 1999: 170-175 - [c21]Anantha P. Chandrakasan, Abram P. Dancy, James Goodman, Thomas Simon:
A Low-Power Wireless Camera System. VLSI Design 1999: 32-36 - 1998
- [j16]Rajeevan Amirtharajah, Anantha P. Chandrakasan:
Self-powered signal processing using vibration-based power generation. IEEE J. Solid State Circuits 33(5): 687-695 (1998) - [j15]James Goodman, Abram P. Dancy, Anantha P. Chandrakasan:
An energy/security scalable encryption processor using an embedded variable voltage DC/DC converter. IEEE J. Solid State Circuits 33(11): 1799-1809 (1998) - [j14]Anantha P. Chandrakasan, Edwin Hsing-Mean Sha:
Special Section on Low-Power Electronics and Design. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 518-519 (1998) - [j13]George Hadjiyiannis, Anantha P. Chandrakasan, Srinivas Devadas:
A low power, low bandwidth protocol for remote wireless terminals. Wirel. Networks 4(1): 3-15 (1998) - [j12]James Goodman, Anantha P. Chandrakasan:
Low power scalable encryption for wireless systems. Wirel. Networks 4(1): 55-70 (1998) - [c20]Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan:
An ultra low power variable length decoder for MPEG-2 exploiting codeword distribution. CICC 1998: 177-180 - [c19]James T. Kao, Siva G. Narendra, Anantha P. Chandrakasan:
MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns. DAC 1998: 495-500 - [c18]Abram P. Dancy, Anantha P. Chandrakasan:
A reconfigurable dual output low power digital PWM power converter. ISLPED 1998: 191-196 - [c17]Debashis Saha, Anantha P. Chandrakasan:
Web-based Distributed VLSI Design. VLSI Design 1998: 449- - [e2]Anantha P. Chandrakasan, Sayfe Kiaei:
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998. ACM 1998, ISBN 1-58113-059-7 [contents] - 1997
- [j11]Wendi Rabiner Heinzelman, Anantha P. Chandrakasan:
Network-driven motion estimation for wireless video terminals. IEEE Trans. Circuits Syst. Video Technol. 7(4): 644-653 (1997) - [j10]Vadim Gutnik, Anantha P. Chandrakasan:
Embedded power supply for low-power DSP. IEEE Trans. Very Large Scale Integr. Syst. 5(4): 425-435 (1997) - [j9]S. Hamid Nawab, Alan V. Oppenheim, Anantha P. Chandrakasan, Joseph M. Winograd, Jeffrey T. Ludwig:
Approximate Signal Processing. J. VLSI Signal Process. 15(1-2): 177-200 (1997) - [c16]James T. Kao, Anantha P. Chandrakasan, Dimitri A. Antoniadis:
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology. DAC 1997: 409-414 - [c15]Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan:
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. DAC 1997: 415-420 - [c14]Wendi Rabiner, Anantha P. Chandrakasan:
Network driven motion estimation for portable video terminals. ICASSP 1997: 2865-2868 - [c13]Jim Burr, Anantha P. Chandrakasan, Fari Assaderaghi, Francky Catthoor, Frank Fox, Dave Greenhill, Deo Singh, Jim Sproch:
Low power design without compromise (panel). ISLPED 1997: 293-294 - [c12]Debashis Saha, Anantha P. Chandrakasan:
A Framework for Distributed Web-based Microsystem Design. WETICE 1997: 69-74 - [e1]Brock Barton, Massoud Pedram, Anantha P. Chandrakasan, Sayfe Kiaei:
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997, Monterey, California, USA, August 18-20, 1997. ACM 1997, ISBN 0-89791-903-3 [contents] - 1996
- [j8]Jeffrey T. Ludwig, S. Hamid Nawab, Anantha P. Chandrakasan:
Low-power digital filtering using approximate processing. IEEE J. Solid State Circuits 31(3): 395-400 (1996) - [j7]Miodrag Potkonjak, Mani B. Srivastava, Anantha P. Chandrakasan:
Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(2): 151-165 (1996) - [j6]Mani B. Srivastava, Anantha P. Chandrakasan, Robert W. Brodersen:
Predictive system shutdown and other architectural techniques for energy efficient programmable computation. IEEE Trans. Very Large Scale Integr. Syst. 4(1): 42-55 (1996) - [j5]Anantha P. Chandrakasan, Robert W. Brodersen:
Guest editors' introduction. J. VLSI Signal Process. 13(2-3): 85-86 (1996) - [c11]Anantha P. Chandrakasan, Isabel Y. Yang, Carlin Vieri, Dimitri A. Antoniadis:
Design Considerations and Tools for Low-voltage Digital System Design. DAC 1996: 113-118 - [c10]Marcelo M. Mizuki, Ujjaval Y. Desai, Ichiro Masaki, Anantha P. Chandrakasan:
A binary block matching architecture with reduced power consumption and silicon area requirement. ICASSP 1996: 3248-3251 - [c9]Anantha P. Chandrakasan, Vadim Gutnik, Thucydides Xanthopoulos:
Data driven signal processing: an approach for energy efficient computing. ISLPED 1996: 347-352 - [c8]Anantha P. Chandrakasan:
Ultra low power digital signal processing. VLSI Design 1996: 352-357 - [c7]Anantha P. Chandrakasan, Kurt Keutzer, A. Khandekar, S. L. Maskara, B. D. Pradhan, Mani B. Srivastava:
Mobile Communications: Demands on VLSI Technology, Design and CAD. VLSI Design 1996: 432-436 - 1995
- [j4]Anantha P. Chandrakasan, Robert W. Brodersen:
Minimizing power consumption in digital CMOS circuits. Proc. IEEE 83(4): 498-523 (1995) - [j3]Anantha P. Chandrakasan, Miodrag Potkonjak, Renu Mehra, Jan M. Rabaey, Robert W. Brodersen:
Optimizing power using transformations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(1): 12-31 (1995) - [c6]Miodrag Potkonjak, Anantha P. Chandrakasan:
Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration. ICIP 1995: 65-68 - 1994
- [j2]Anantha P. Chandrakasan, Andrew Burstein, Robert W. Brodersen:
A low-power chipset for a portable multimedia I/O terminal. IEEE J. Solid State Circuits 29(12): 1415-1428 (1994) - [c5]Miodrag Potkonjak, Mani B. Srivastava, Anantha P. Chandrakasan:
Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching. DAC 1994: 189-194 - [c4]Robert W. Brodersen, Thomas D. Burd, Fred L. Burghardt, Andrew J. Burstein, Anantha P. Chandrakasan, Roger Doering, Shankar Narayanaswamy, Trevor Pering, Brian C. Richards, Thomas E. Truman, Jan M. Rabaey:
Research challenges in wireless multimedia. PIMRC 1994: 1-5 - [c3]Anantha P. Chandrakasan, Mani B. Srivastava, Robert W. Brodersen:
Energy Efficient Programmable Computation. VLSI Design 1994: 261-264 - 1992
- [j1]Samuel Sheng, Anantha P. Chandrakasan, Robert W. Brodersen:
A portable multimedia terminal. IEEE Commun. Mag. 30(12): 64-75 (1992) - [c2]Anantha P. Chandrakasan, Miodrag Potkonjak, Jan M. Rabaey, Robert W. Brodersen:
HYPER-LP: a system for power minimization using architectural transformations. ICCAD 1992: 300-303 - [c1]Anantha P. Chandrakasan, Samuel Sheng, Robert W. Brodersen:
Low Power Techniques for Portable Real-time DSP Applications. VLSI Design 1992: 203-208
Coauthor Index
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