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Anthony Quelen
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2020 – today
- 2021
- [c11]Yasser Moursy, Thiago Raupp da Rosa, Lionel Jure, Anthony Quelen, Sébastien Genevey, Lionel Pierrefeu, Emmanuel G. Collins Jr., Joerg Winkler, Jonathan Park, Gaël Pillonnet, Vincent Huard, Andrea Bonzo, Philippe Flatresse:
A 0.021mm2 PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology. ISSCC 2021: 492-494 - 2020
- [c10]Adrien Morel, Anthony Quelen, Carlos Augusto Berlitz, David Gibus, Pierre Gasnier, Adrien Badel, Gaël Pillonnet:
32.2 Self-Tunable Phase-Shifted SECE Piezoelectric Energy-Harvesting IC with a 30nW MPPT Achieving 446% Energy-Bandwidth Improvement and 94% Efficiency. ISSCC 2020: 488-490 - [c9]Anthony Quelen, Gaël Pillonnet, Pierre Gasnier, François Rummens, Sebastien Boisseau:
32.3 Electromagnetic Mechanical Energy-Harvester IC with No Off-Chip Component and One Switching Period MPPT Achieving up to 95.9% End-to-End Efficiency and 460% Energy-Extraction Gain. ISSCC 2020: 490-492 - [c8]Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy:
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits 2020: 1-2
2010 – 2019
- 2018
- [j1]Adrien Morel, Anthony Quelen, Pierre Gasnier, Romain Grezaud, Stéphane Monfray, Adrien Badel, Gaël Pillonnet:
A Shock-Optimized SECE Integrated Circuit. IEEE J. Solid State Circuits 53(12): 3420-3433 (2018) - [c7]Anthony Quelen, Guilherme Migliato Marega, Sylvain Bouquet, Ivan Miro Panades, Gaël Pillonnet:
LDO-Assisted Voltage Selector Over 0.5-to-1V VDD Range for Fine Grained DVS in FDSOI 28nm with 200ns/V Controlled Transition. ESSCIRC 2018: 202-205 - [c6]Mickael Maman, Dominique Morche, Baudouin Martineau, Clement Jany, Ivan Miro Panades, Anthony Quelen, Franck Badets, Edith Beigné:
Benefits of Joint Optimization of Tunable Wake-up Radio Architecture and Protocols. ICECS 2018: 789-792 - [c5]Anthony Quelen, Adrien Morel, Pierre Gasnier, Romain Grezaud, Stéphane Monfray, Gaël Pillonnet:
A 30nA quiescent 80nW-to-14mW power-range shock-optimized SECE-based piezoelectric harvesting interface with 420% harvested-energy improvement. ISSCC 2018: 150-152 - [c4]Anthony Quelen, Gaël Pillonnet, Philippe Flatresse, Edith Beigné:
A 2.5μW 0.0067mm2 automatic back-biasing compensation unit achieving 50% leakage reduction in FDSOI 28nm over 0.35-to-1V VDD range. ISSCC 2018: 304-306 - 2017
- [c3]Anthony Quelen, Franck Badets, Gaël Pillonnet:
A sub-100nW power supply unit embedding untrimmed timing and voltage references for duty-cycled μW-range load in FDSOI 28nm. ESSCIRC 2017: 279-282 - [c2]Yasser Moursy, Anthony Quelen, Gaël Pillonnet:
Challenges for fully-integrated resonant switched capacitor converters in CMOS technologies. ICECS 2017: 198-201 - [c1]Yasser Moursy, Anthony Quelen, Gaël Pillonnet:
Design of fully integrated resonance switched capacitor converters in FDSOI technology. NEWCAS 2017: 149-152
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