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2010 – 2019
- 2013
[j2]Cheoljon Jang, Jaehwan Kim, Byung-Gyu Ahn, Jongwha Chong:
Power bumps and through-silicon-vias placement with optimised power mesh structure for power delivery network in three-dimensional-integrated circuits. IET Comput. Digit. Tech. 7(1): 11-20 (2013)- [c6]Kristina Toutanova, Byung-Gyu Ahn:
Learning Non-linear Features for Machine Translation Using Gradient Boosting Machines. ACL (2) 2013: 406-411 - 2012
- [c5]Minbeom Kim, Byung-Gyu Ahn, Jaehwan Kim, Bongki Lee, Jong-Wha Chong:
Thermal aware timing budget for buffer insertion in early stage of physical design. ISCAS 2012: 357-360 - [c4]Bongki Lee, Byung-Gyu Ahn, Jaehwan Kim, Minbeom Kim, Jong-Wha Chong:
A novel methodology for power delivery network optimization in 3-D ICs using through-silicon-via technology. ISCAS 2012: 3262-3265 - 2010
- [j1]Jonathan H. Clark, Jonathan Weese, Byung-Gyu Ahn, Andreas Zollmann, Qin Gao, Kenneth Heafield, Alon Lavie:
The Machine Translation Toolpack for LoonyBin: Automated Management of Experimental Machine Translation HyperWorkflows. Prague Bull. Math. Linguistics 93: 117-126 (2010) - [c3]Yue Zhang, Byung-Gyu Ahn, Stephen Clark, Curt Van Wyk, James R. Curran, Laura Rimell:
Chart Pruning for Fast Lexicalised-Grammar Parsing. COLING (Posters) 2010: 1471-1479
2000 – 2009
- 2008
- [c2]Sea-Ho Kim, Byung-Gyu Ahn, Ki-Seok Chung, Sung-Hwan Oh:
Timing driven force-directed floorplanning with incremental static timing analyzer. APCCAS 2008: 1000-1003 - [c1]Byung-Gyu Ahn, Jun-Mo Jung, Jong-Wha Chong:
Power-Aware Test Framework for Network-on-Chip. ICONS 2008: 103-107
Coauthor Index
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