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Integration, Volume 74
Volume 74, September 2020
- Fanny Spagnolo, Stefania Perri, Pasquale Corsonello:
Design of a real-time face detection architecture for heterogeneous systems-on-chips. 1-10 - Elia A. Vallicelli, Davide Turossi, Luca Gelmi, Alessandro Baù, Roberto Bertoni, Walter Fulgione, Alessandro Quintino, Massimo Corcione, Andrea Baschirotto, Marcello De Matteis:
A 0.3nV/√Hz input-referred-noise analog front-end for radiation-induced thermo-acoustic pulses. 11-18
- TaiYu Cheng, Yukata Masuda, Jun Chen, Jaehoon Yu, Masanori Hashimoto:
Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training. 19-31 - Mateus Fogaça, Andrew B. Kahng, Eder Monteiro, Ricardo Reis, Lutong Wang, Mingyu Woo:
On the superiority of modularity-based clustering for determining placement-relevant clusters. 32-44 - Mounira Bchir, Imen Aloui, Nejib Hassen:
A bulk-driven quasi-floating gate FVF current mirror for low voltage, low power applications. 45-54 - Vala Sadrafshari, Shamin Sadrafshari, Mohammad Sharifkhani:
Yield constrained automated design algorithm for power optimized pipeline ADC. 55-62 - Honghui Deng, Yijun Hu, Liang Wang:
An efficient background calibration technique for analog-to-digital converters based on neural network. 63-70 - David C. C. Freitas, David F. M. Mota, Roger C. Goerl, César A. M. Marcon, Fabian Vargas, Jarbas A. N. Silveira, João Cesar M. Mota:
PCoSA: A product error correction code for use in memory devices targeting space applications. 71-80 - Taehwan Kim, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyu-Myung Choi:
SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage. 81-92 - Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay:
A cellular automata guided two level obfuscation of Finite-State-Machine for IP protection. 93-106 - Vu Trung Duong Le, Nguyen Thi Thanh Thuy, Lam Duc Khai:
A fast approach for bitcoin blockchain cryptocurrency mining system. 107-114 - Xiaole Cui, Qiujun Lin, Xiaoxin Cui, Feng Wei, Xiaoyan Liu, Jinfeng Kang:
The synthesis method of logic circuits based on the iMemComp gates. 115-126
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