"A Low-Latency Low-Power QR-Decomposition ASIC Implementation in 0.13 ..."

Mahdi Shabany, Dimpesh Patel, P. Glenn Gulak (2013)

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DOI: 10.1109/TCSI.2012.2215775

access: closed

type: Journal Article

metadata version: 2020-05-22

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Mahdi Shabany, Dimpesh Patel, P. Glenn Gulak:
A Low-Latency Low-Power QR-Decomposition ASIC Implementation in 0.13 µm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(2): 327-340 (2013)

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