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"Low area and high throughput implementation of advanced encryption ..."
N. Renugadevi et al. (2023)
- N. Renugadevi, Stheya Julakanti, Sai Charan Vemula, Somya Bhatnagar, Shirisha Thangallapally:
Low area and high throughput implementation of advanced encryption standard hardware accelerator on FPGA using Mux-Demux pair. Secur. Priv. 6(4) (2023)
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