BibTeX record journals/jssc/XueJYXCXXLHZW13

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@article{DBLP:journals/jssc/XueJYXCXXLHZW13,
  author       = {Xiaoyong Xue and
                  Wenxiang Jian and
                  Jianguo Yang and
                  Fanjie Xiao and
                  Gang Chen and
                  Shuliu Xu and
                  Yufeng Xie and
                  Yinyin Lin and
                  Ryan Huang and
                  Qingtian Zou and
                  Jingang Wu},
  title        = {A 0.13 {\(\mathrm{\mu}\)}m 8 Mb Logic-Based Cu\({}_{\mbox{x}}\) Si\({}_{\mbox{y}}\)
                  {O} ReRAM With Self-Adaptive Operation for Yield Enhancement and Power
                  Reduction},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {48},
  number       = {5},
  pages        = {1315--1322},
  year         = {2013},
  url          = {https://doi.org/10.1109/JSSC.2013.2247678},
  doi          = {10.1109/JSSC.2013.2247678},
  timestamp    = {Sun, 30 Aug 2020 00:14:10 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/XueJYXCXXLHZW13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}