BibTeX record journals/jsa/SelzEV96

download as .bib file

@article{DBLP:journals/jsa/SelzEV96,
  author       = {Manfred Selz and
                  Wolfgang Ecker and
                  Eugenio Villar},
  title        = {{VHDL} synthesis description portability: The need for Level synthesis
                  subsets},
  journal      = {J. Syst. Archit.},
  volume       = {42},
  number       = {2},
  pages        = {105--116},
  year         = {1996},
  url          = {https://doi.org/10.1016/1383-7621(96)00017-3},
  doi          = {10.1016/1383-7621(96)00017-3},
  timestamp    = {Tue, 19 May 2020 15:54:50 +0200},
  biburl       = {https://dblp.org/rec/journals/jsa/SelzEV96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.