"Network Processor for High-Speed Network and Quick Programming."

Takahiro Murooka et al. (2007)

> Home

Details and statistics

DOI: 10.1142/S0218126607003502

access: closed

type: Journal Article

metadata version: 2025-01-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jcsc/MurookaNMON07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jcsc/MurookaNMON07
Takahiro Murooka, Akira Nagoya, Toshiaki Miyazaki, Hiroyuki Ochi, Yukihiro Nakamura:
Network Processor for High-Speed Network and Quick Programming. J. Circuits Syst. Comput. 16(1): 65-79 (2007)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.