BibTeX record conf/vlsit/HsiaCCLJPL24

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@inproceedings{DBLP:conf/vlsit/HsiaCCLJPL24,
  author       = {Chu{-}En Hsia and
                  Chin{-}Ho Chang and
                  Yung{-}Shun Chen and
                  Po{-}Yu Lai and
                  Ching Lin Jen and
                  Yung{-}Chow Peng and
                  Shenggao Li},
  title        = {Current Mirrors with Tapered Stacked-Gates for Area Saving or Noise
                  Improvement in 3nm FinFET Process},
  booktitle    = {{IEEE} Symposium on {VLSI} Technology and Circuits 2024, Honolulu,
                  HI, USA, June 16-20, 2024},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2024},
  url          = {https://doi.org/10.1109/VLSITechnologyandCir46783.2024.10631454},
  doi          = {10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631454},
  timestamp    = {Thu, 17 Oct 2024 16:05:50 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/HsiaCCLJPL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}