BibTeX record conf/vlsid/MaheshwariKSG16

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@inproceedings{DBLP:conf/vlsid/MaheshwariKSG16,
  author       = {Pragya Maheshwari and
                  Suhas Kaushik and
                  Mahendra Sakare and
                  Shalabh Gupta},
  title        = {A 12.5 Gbps One-Fifth Rate {CDR} Incorporating a Novel Sampler Based
                  Phase Detector and a {DFE}},
  booktitle    = {29th International Conference on {VLSI} Design and 15th International
                  Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
                  4-8, 2016},
  pages        = {555--556},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/VLSID.2016.51},
  doi          = {10.1109/VLSID.2016.51},
  timestamp    = {Fri, 24 Mar 2023 00:04:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MaheshwariKSG16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}