"Hardware Overhead Reduction for Memory BIST."

Masayuki Arai et al. (2008)

> Home

Details and statistics

DOI: 10.1109/TEST.2008.4700690

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/itc/AraiINS08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/AraiINS08
Masayuki Arai, Kazuhiko Iwasaki, Michinobu Nakao, Iwao Suzuki:
Hardware Overhead Reduction for Memory BIST. ITC 2008: 1

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.