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BibTeX record conf/isscc/ChoCBAKLYKPLJCLKSPLKWMKLJLKHASJSBPOYH24
@inproceedings{DBLP:conf/isscc/ChoCBAKLYKPLJCLKSPLKWMKLJLKHASJSBPOYH24, author = {Sung{-}Yong Cho and Moon{-}Chul Choi and Jaehyeok Baek and Donggun An and Sanghoon Kim and Daewoong Lee and Seongyeal Yang and Gil{-}Young Kang and Juseop Park and Kyungho Lee and Hwan{-}Chul Jung and Gun{-}hee Cho and Chanyong Lee and Hye{-}Ran Kim and Yong{-}Jae Shin and Hanna Park and Sangyong Lee and Jonghyuk Kim and Bokyeon Won and Jungil Mok and Kijin Kim and Unhak Lim and Hongjun Jin and YoungSeok Lee and Young{-}Tae Kim and Heonjoo Ha and Jinchan Ahn and Wonju Sung and Yoontaek Jang and Hoyoung Song and Hyodong Ban and TaeHoon Park and Tae{-}Young Oh and Changsik Yoo and SangJoon Hwang}, title = {13.6 {A} 16Gb 37Gb/s {GDDR7} {DRAM} with PAM3-Optimized {TRX} Equalization and {ZQ} Calibration}, booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024, San Francisco, CA, USA, February 18-22, 2024}, pages = {242--244}, publisher = {{IEEE}}, year = {2024}, url = {https://doi.org/10.1109/ISSCC49657.2024.10454354}, doi = {10.1109/ISSCC49657.2024.10454354}, timestamp = {Mon, 03 Mar 2025 21:15:45 +0100}, biburl = {https://dblp.org/rec/conf/isscc/ChoCBAKLYKPLJCLKSPLKWMKLJLKHASJSBPOYH24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

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