"Optimizing test architecture of 3D stacked ICs for partial stack/complete ..."

Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman (2013)

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DOI: 10.1109/IDT.2013.6727114

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-22

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Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman:
Optimizing test architecture of 3D stacked ICs for partial stack/complete stack using hard SoCs. IDT 2013: 1-3

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