"A Methodology for Mapping SysML Activity Diagram to Time Petri Net for ..."

Ermeson Carneiro de Andrade et al. (2009)

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DOI: 10.1109/ICDS.2009.19

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ermeson Carneiro de Andrade, Paulo Romero Martins Maciel, Gustavo Rau de Almeida Callou, Bruno Costa e Silva Nogueira:
A Methodology for Mapping SysML Activity Diagram to Time Petri Net for Requirement Validation of Embedded Real-Time Systems with Energy Constraints. ICDS 2009: 266-271

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