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"FPGA Low Power Technology Mapping for Reuse Module Design under the Time ..."
Jae-Jin Kim et al. (2008)
- Jae-Jin Kim, Hyeon-Mi Yang, Keun Ho Ryu, Hi-Seok Kim:
FPGA Low Power Technology Mapping for Reuse Module Design under the Time Constraint. FGCN (2) 2008: 57-61

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