default search action
"A 128×128b high-speed wide-and match-line content addressable memory ..."
Amit Agarwal et al. (2011)
- Amit Agarwal, Steven Hsu, Sanu Mathew, Mark A. Anders, Himanshu Kaul, Farhana Sheikh, Ram Krishnamurthy:
A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS. ESSCIRC 2011: 83-86
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.