Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. - Danger, Jean-Luc; Yashiro, Risa; Graba, Tarik; Mathieu, Yves; Si-Merabet, Abdelmalek; Sakiyama, Kazuo; Miura, Noriyuki; Nagata, Makoto (2018)