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"A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA ..."
Kris Tiri, Ingrid Verbauwhede (2004)
- Kris Tiri, Ingrid Verbauwhede
:
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. DATE 2004: 246-251
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