"Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a ..."

Nevine Nassif, Madhav P. Desai, Dale H. Hall (1998)

> Home

Details and statistics

DOI: 10.1145/277044.277104

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dac/NassifDH98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dac/NassifDH98
Nevine Nassif, Madhav P. Desai, Dale H. Hall:
Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a 600MHz CMOS Microprocessor. DAC 1998: 230-235

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.