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ORCIDJun Yang 0006
Person information
- affiliation: Southeast University, National ASIC system Engineering Research Center, Nanjing, China
Other persons with the same name
- Jun Yang — disambiguation page
- Jun Yang 0001
![[0000-0003-0604-6790]](https://dblp.org/img/orcid-mark.12x12.png "0000-0003-0604-6790")
— Duke University, Durham, NC, USA - Jun Yang 0002 — University of Pittsburgh, Department of Electrical and Computer Engineering, PA, USA
- Jun Yang 0003 — Carnegie Mellon University
- Jun Yang 0004 — Chinese Academy of Sciences, Institute of Acoustics, Key Laboratory of Noise and Vibration Research, Beijing, China (and 2 more)
- Jun Yang 0005 — Southwest Jiaotong University, School of Information Science and Technology, Chengdu, China (and 1 more)
- Jun Yang 0007 — Nagoya University
- Jun Yang 0008 — Northeastern University, Shenyang
- Jun Yang 0009 — Xi'an Jiaotong University, Xi'an, China
- Jun Yang 0010 — University of Toronto, Department of Statistical Sciences, ON, Canada (and 1 more)
- Jun Yang 0011 — Loughborough University, Department of Aeronautical and Automotive Engineering, Leicestershire, UK (and 1 more)
- Jun Yang 0012 — Liaoning Normal University, China
- Jun Yang 0013 — Civil Aviation Flight University of China, Guanghan, China
- Jun Yang 0014 — Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan, China
- Jun Yang 0015 — Wuhan University of Science and Technology, School of Information Science and Engineering, China
- Jun Yang 0016 — Tsinghua University, Center for Earth System Science, Beijing, China (and 3 more)
- Jun Yang 0017 — Huazhong University of Science and Technology, School of Automation, Wuhan, China (and 1 more)
- Jun Yang 0018 — Beihang University, School of Reliability and Systems Engineering, Beijing, China (and 1 more)
- Jun Yang 0019 — Wuhan University, School of Electrical Engineering, China (and 1 more)
- Jun Yang 0020 — University of Hanover, Germany
- Jun Yang 0021 — China State Shipbuilding Corporation, Beijing, China
- Jun Yang 0022 — A-STAR, Data Stoarge Institute, Singapore (and 1 more)
- Jun Yang 0023 — University of Electronic Science and Technology of China, Shenzhen Institute for Advanced Study, China (and 2 more)
- Jun Yang 0024 — Guangdong University of Technology, School of Information Engineering, China (and 1 more)
- Jun Yang 0025 — Sichuan Normal University, College of Computer Science / Visual Computing and Virtual Reality Key Laboratory of Sichuan Province, Chengdu, China
- Jun Yang 0026 — National University of Defense Technology, College of Artificial Intelligence, Changsha, China
- Jun Yang 0027 — South China University of Technology, School of Electric Power, Guangzhou, China (and 2 more)
- Jun Yang 0028 — Tsinghua University, Department of Automation, Beijing, China (and 1 more)
- Jun Yang 0029 — Kunming University of Science and Technology, Faculty of Mechanical and Electrical Engineering, China
- Jun Yang 0030 — Yunnan University, School of Information Science and Engineering, Kunming, China
- Jun Yang 0031 — South China University of Technology, School of Mechanical and Automotive Engineering, Guangzhou, China
- Jun Yang 0032 — Nankai University, College of Computer and Control Engineering, Tianjin, China
- Jun Yang 0033 — University of New South Wales, AustraliaNational ICT Australia, Sydney, NSW, Australia
- Jun Yang 0034 — Xi'an University of Science and Technology, School of Geodesy and Geomatics, China (and 1 more)
- Jun Yang 0035 — Beijing University of Posts and Telecommunications, School of Computer Science, National Engineering Laboratory for Mobile Network, China
- Jun Yang 0036 — Guangzhou University, China (and 3 more)
- Jun Yang 0037 — Chinese Academy of Sciences, Chongqing Institute of Green and Intelligent Technology, China
- Jun Yang 0038 — Nanjing University, Department of Computer Science and Technology, National Key Laboratory for Novel Software Technology, China
- Jun Yang 0039 — Civil Aviation University of China, Tianjin Key Laboratory for Advanced Signal Processing, China
- Jun Yang 0040 — China University of Mining and Technology, School of Environment Science and Spatial Informatics, Xuzhou, China
- Jun Yang 0041 — Southwest Jiaotong University, School of Transportation and Logistics, Chengdu, China
- Jun Yang 0042 — Jinan University, Institute for Environmental and Climate Research, Guangzhou, China
- Jun Yang 0043 — Chinese Academy of Sciences, Shanghai Chenshan Plant Science Research Center, China
- Jun Yang 0044 — China Mobile Communications Group Gansu Co., Ltd., Network Management Center, Lanzhou, China
- Jun Yang 0045 — Acadia University, School of Business Administration, Wolfville, NS, Canada
- Jun Yang 0046 — Xianyang Normal University, School of Mathematics and Information Science, China
- Jun Yang 0047 — Hefei University of Technology, Academy of Opto-electric Technology, Special Display and Imaging Technology Innovation Center of Anhui Province, China
- Jun Yang 0048 — State Grid Qinghai Electric Power Company, Electric Power Research Institute, Xining, China
- Jun Yang 0049 — China University of Mining and Technology, Big Data and Internet of Things Research Center, Beijing, China (and 1 more)
- Jun Yang 0050 — Shandong University, School of Control Science and Engineering, Jinan, China (and 2 more)
- Jun Yang 0051 — Jiaxing University, College of Mathematics Physics and Information Engineering, China (and 1 more)
- Jun Yang 0052 — NVIDIA Corp, Beijing, China (and 1 more)
- Jun Yang 0053 — University of Toronto, Institute for Aerospace Studies and Robotics Institute, Toronto, Canada
- Jun Yang 0054 — Northwest Institute of Nuclear Technology, National Key Laboratory of Intense Pulsed Radiation Simulation and Effect, Xi'an, China (and 1 more)
- Jun Yang 0055 — Huazhong University of Science and Technology, School of Management, Wuhan, China (and 1 more)
- Jun Yang 0056 — Tongji University, Department of Computer Science and Technology, Shanghai, China (and 3 more)
- Jun Yang 0057 — South China University of Technology, School of Electronic and Information Engineering, Guangzhou, China (and 1 more)
- Jun Yang 0058 — ZTE Corporation, Wireless Product Research and Development Institute, Shenzhen, China (and 2 more)
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2020 – today
- 2024
[j90]Chenchen Deng, Tianzhu Xiong, Zhaoshi Li, Zhiwei Liu, Yao Wang, Jianfeng Zhu, Jun Yang, Shaojun Wei, Leibo Liu:
CATCAM: a 28 nm constant-time alteration TCAM enabling less than 50 ns update latency. Sci. China Inf. Sci. 67(4) (2024)- [j89]Jieyu Li, Weifeng He, Bo Zhang, Guanghui He, Jing Jin, Jun Yang, Mingoo Seok:
TICA: Timing Slack Inference and Clock Frequency Adaption Technique for a Deeply Pipelined Near-Threshold-Voltage Bitcoin Mining Core. IEEE J. Solid State Circuits 59(2): 605-615 (2024) - [j88]Chuxiong Lin, Weifeng He, Yanan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok:
A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip. IEEE J. Solid State Circuits 59(2): 616-625 (2024) - [j87]An Guo, Chen Xi, Fangyuan Dong, Xingyu Pu, Dongqi Li, Jingmin Zhang, Xueshan Dong, Hui Gao, Yiran Zhang, Bo Wang, Jun Yang, Xin Si:
A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs. IEEE J. Solid State Circuits 59(9): 3032-3044 (2024) - [j86]Yan Zhao, Chao Chen, Jun Yang:
A 55 μ W 2.4 GHz wake-up receiver with offset-based peak detection achieving -90dBm sensitivity for IoT applications. Microelectron. J. 145: 106106 (2024) - [j85]Ziran Zhu, Yangjie Mei, Kangkang Deng, Huan He, Jianli Chen, Jun Yang, Yao-Wen Chang:
High-Performance Placement Engine for Modern Large-Scale FPGAs With Heterogeneity and Clock Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 956-969 (2024) - [j84]Yan Zhao, Chao Chen, Jun Yang:
A 0.65 V 4 dB NF 2.4 GHz Sub-Passive RF Down-Converter With Trans-Frequency Current-Reusing Scheme Achieving Low Flicker Noise and High Linearity. IEEE Trans. Circuits Syst. I Regul. Pap. 71(7): 3029-3040 (2024) - [j83]Ziran Zhu, Fuheng Shen, Yangjie Mei, Jianli Chen, Jun Yang:
An Effective Routing Refinement Algorithm Based on Incremental Replacement and Rerouting. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 161-165 (2024) - [j82]Ziran Zhu, Yuejian Shi, Yangjie Mei, Fuheng Shen, Hong Liu, Jun Yang:
High-Performance 3-D Placement Engine With Physical-Aware Incremental Partitioning. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1151-1155 (2024) - [j81]Haoran Du, You Wang, Jun Yang, Hao Cai:
Intrinsic MRAM Properties Enable Security Circuits. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1695-1700 (2024) - [j80]Hao Gu, Jian Gu, Keyu Peng, Ziran Zhu, Ning Xu, Xin Geng, Jun Yang:
LAMPlace: Legalization-Aided Reinforcement Learning-Based Macro Placement for Mixed-Size Designs With Preplaced Blocks. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3770-3774 (2024) - [c63]Biao Liu, Congyu Qiao, Ning Xu, Xin Geng, Ziran Zhu, Jun Yang:
Variational Label-Correlation Enhancement for Congestion Prediction. ASPDAC 2024: 466-471 - [c62]Zhaoyang Zhang, Zhichao Liu, Feiran Liu, Yinhai Gao, Yuchen Ma, Yutong Zhang, An Guo, Tianzhu Xiong, Jinwu Chen, Xi Chen, Bo Wang, Yuchen Tang, Xingyu Pu, Xing Wang, Jun Yang, Xin Si:
A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs. CICC 2024: 1-2 - [c61]Weiwei Shan, Kaize Zhou, Keran Li, Yuxuan Du, Zhuo Chen, Junyi Qian, Haitao Ge, Jun Yang, Xin Si:
14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOS. ISSCC 2024: 256-258 - [c60]An Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si:
34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs. ISSCC 2024: 570-572 - 2023
- [j79]Weiwei Shan, Yuqiang Cui, Wentao Dai, Xinning Liu, Jingjing Guo, Peng Cao, Jun Yang:
An efficient path delay variability model for wide-voltage-range digital circuits. Sci. China Inf. Sci. 66(2) (2023) - [j78]Zhaoyang Zhang, Jinwu Chen, Xi Chen, An Guo, Bo Wang, Tianzhu Xiong, Yuyao Kong, Xingyu Pu, Shengnan He, Xin Si, Jun Yang:
From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits. Sci. China Inf. Sci. 66(10) (2023) - [j77]Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Renyuan Zhang, Yu Gong, Zhen Wang, Wei Ge, Jun Yang:
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition. IEEE Des. Test 40(3): 26-35 (2023) - [j76]Luchi Hua, Yuan Zhuang, Jun Yang:
SmartFPS: Neural network based wireless-inertial fusion positioning system. Frontiers Neurorobotics 17 (2023) - [j75]Yuan Zhuang, Xiao Sun, You Li, Jianzhu Huai, Luchi Hua, Xiansheng Yang, Xiaoxiang Cao, Peng Zhang, Yue Cao, Longning Qi, Jun Yang, Nashwa El-Bendary, Naser El-Sheimy, John S. Thompson, Ruizhi Chen:
Multi-sensor integrated navigation/positioning systems using data fusion: From analytics-based to learning-based approaches. Inf. Fusion 95: 62-90 (2023) - [j74]Weiwei Shan, Junyi Qian, Lixuan Zhu, Jun Yang, Cheng Huang, Hao Cai:
AAD-KWS: A Sub-μ W Keyword Spotting Chip With an Acoustic Activity Detector Embedded in MFCC and a Tunable Detection Window in 28-nm CMOS. IEEE J. Solid State Circuits 58(3): 867-876 (2023) - [j73]Zhengguo Shen, Weiwei Shan, Yuxuan Du, Ziyu Li, Jun Yang:
Beyond Eliminating Timing Margin: An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator Without Accuracy Loss. IEEE J. Solid State Circuits 58(5): 1462-1471 (2023) - [j72]Chao Chen, Dan Huang, Yan Zhao, Yuemin Jin, Jun Yang:
An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3. IEEE J. Solid State Circuits 58(7): 1825-1837 (2023) - [j71]Yuyao Kong, Xi Chen, Xin Si, Jun Yang:
Evaluation Platform of Time-Domain Computing-in-Memory Circuits. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1174-1178 (2023) - [j70]Yan Zhao, Chao Chen, Jun Yang:
A 0.55V 10-Bit 100-MS/s SAR ADC With 3.6-fJ/Conversion-Step in 28nm CMOS for RF Receivers. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 1811-1815 (2023) - [j69]Peng Cao, Guoqing He, Wenjie Ding, Zhanhua Zhang, Kai Wang, Jun Yang:
Efficient and Accurate ECO Leakage Optimization Framework With GNN and Bidirectional LSTM. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1413-1424 (2023) - [j68]Hao Gu, Jun Yang, Guan Gui, Haris Gacanin:
Triplet MatchNet Based Indoor Position Method Using CSI Fingerprint Similarity Comparison. IEEE Trans. Veh. Technol. 72(12): 16905-16910 (2023) - [c59]An Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang:
A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs. ISSCC 2023: 128-129 - [c58]Bo Wang, Chen Xue, Zhongyuan Feng, Zhaoyang Zhang, Han Liu, Lizheng Ren, Xiang Li, Anran Yin, Tianzhu Xiong, Yeyang Xue, Shengnan He, Yuyao Kong, Yongliang Zhou, An Guo, Xin Si, Jun Yang:
A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks. ISSCC 2023: 134-135 - [c57]Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-Le Cui, Yanan Guo, Xiaoyun Tian, Bo Liu, Xin Si, Zhen Wang, Jun Yang, Weiwei Shan:
A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference. ISSCC 2023: 500-501 - [i4]Biao Liu, Congyu Qiao, Ning Xu, Xin Geng, Ziran Zhu, Jun Yang:
Variational Label-Correlation Enhancement for Congestion Prediction. CoRR abs/2308.00529 (2023) - 2022
- [j67]Bo Liu, Zilong Zhang, Hao Cai, Reyuan Zhang, Zhen Wang, Jun Yang:
Self-compensation tensor multiplication unit for adaptive approximate computing in low-power CNN processing. Sci. China Inf. Sci. 65(4) (2022) - [j66]Xinning Liu, Xiaomin Li, Huanqing Zhang, Chenyang Li, Lizheng Ren, Qing Chen, Yibo Xu, Jun Yang:
SCVR-Less Dynamic Voltage-Stacking Scheme for IoT MCU. IEEE J. Solid State Circuits 57(1): 103-114 (2022) - [j65]Bo Liu, Ziyu Wang, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Qiao Shen, Na Xie, Yu Gong, Zhen Wang, Jun Yang, Hao Cai:
An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4217-4228 (2022) - [j64]Hao Cai, Yanan Guo, Bo Liu, Mingyang Zhou, Juntong Chen, Xinning Liu, Jun Yang:
Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1519-1531 (2022) - [j63]Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Ziyu Wang, Yu Gong, Weiqiang Liu, Jinjiang Yang, Zhen Wang, Jun Yang:
More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1571-1582 (2022) - [j62]Chao Chen, Peng Li, Xin Jian, Langyun Wu, Jun Yang:
Optimal Edge Nodes Deployment With Multi Association for Smart Health. IEEE Trans. Mol. Biol. Multi Scale Commun. 8(1): 1-8 (2022) - [c56]Xi Chen, An Guo, Xinbing Xu, Xin Si, Jun Yang:
A Quantization Model Based on a Floating-point Computing-in-Memory Architecture. APCCAS 2022: 493-496 - [c55]Jieyu Li, Weifeng He, Bo Zhang, Guanghui He, Jun Yang, Mingoo Seok:
TICA: A 0.3V, Variation-Resilient 64-Stage Deeply-Pipelined Bitcoin Mining Core with Timing Slack Inference and Clock Frequency Adaption. CICC 2022: 1-2 - [c54]Chuxiong Lin, Weifeng He, Yannan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok:
MPAM: Reliable, Low-Latency, Near-Threshold-Voltage Multi-Voltage/Frequency-Domain Network-on-Chip with Metastability Risk Prediction and Mitigation. CICC 2022: 1-2 - [c53]Ziran Zhu, Yangjie Mei, Zijun Li, Jingwen Lin, Jianli Chen, Jun Yang, Yao-Wen Chang:
High-performance placement for large-scale heterogeneous FPGAs with clock constraints. DAC 2022: 643-648 - [c52]Bo Liu, Hao Cai, Xuan Zhang, Haige Wu, Anfeng Xue, Zilong Zhang, Zhen Wang, Jun Yang:
A Target-Separable BWN Inspired Speech Recognition Processor with Low-power Precision-adaptive Approximate Computing. DATE 2022: 196-201 - [c51]Juntong Chen, Hao Cai, Bo Liu, Jun Yang:
Triple-Skipping Near-MRAM Computing Framework for AIoT Era. DATE 2022: 1401-1406 - [c50]Hao Gu, Jun Yang, Zhengran He, Guan Gui, Haris Gacanin:
Graph Convolutional Network Empowered Indoor Localization Method via Aggregating MIMO CSI. GLOBECOM 2022: 6481-6486 - [c49]Haitao Ge, Weiwei Shan, Yicheng Lu, Jun Yang:
A 28nm, 4.69TOPS/W Training, 2.34µJ/lmage Inference, on-chip Training Accelerator with Inference-compatible Back Propagation. ICTA 2022: 98-99 - [c48]An Guo, Yongliang Zhou, Bo Wang, Tianzhu Xiong, Chen Xue, Yufei Wang, Xin Si, Jun Yang:
ShareFloat CIM: A Compute-In-Memory Architecture with Floating-Point Multiply-and-Accumulate Operations. ISCAS 2022: 2276-2280 - [c47]Bo Wang, Chen Xue, Han Liu, Xiang Li, Anran Yin, Zhongyuan Feng, Yuyao Kong, Tianzhu Xiong, Haiming Hsu, Yongliang Zhou, An Guo, Yufei Wang, Jun Yang, Xin Si:
SNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation. ISCAS 2022: 3383-3387 - [i3]Luchi Hua, Jun Yang:
SmartFPS: Neural Network based Wireless-inertial fusion positioning system. CoRR abs/2209.13261 (2022) - 2021
- [j61]Hao Cai, Bo Liu, Juntong Chen, Lirida A. B. Naviner, Yongliang Zhou, Zhen Wang, Jun Yang:
A survey of in-spin transfer torque MRAM computing. Sci. China Inf. Sci. 64(6) (2021) - [j60]Weiwei Shan, Minhao Yang, Tao Wang, Yicheng Lu, Hao Cai, Lixuan Zhu, Jiaming Xu, Chengjun Wu, Longxing Shi, Jun Yang:
A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS. IEEE J. Solid State Circuits 56(1): 151-164 (2021) - [j59]Jianxun Yang, Yuyao Kong, Zhao Zhang, Zhuangzhi Liu, Jing Zhou, Yiqi Wang, Yonggang Liu, Chenfu Guo, Te Hu, Congcong Li, Leibo Liu, Jin Zhang, Shaojun Wei, Jun Yang, Shouyi Yin:
TIMAQ: A Time-Domain Computing-in-Memory-Based Processor Using Predictable Decomposed Convolution for Arbitrary Quantized DNNs. IEEE J. Solid State Circuits 56(10): 3021-3038 (2021) - [j58]Jingjing Guo, Peng Cao, Mengxiao Li, Yu Gong, Zhiyuan Liu, Geng Bai, Jun Yang:
Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 931-944 (2021) - [j57]Ming Ling, Qingde Lin, Ke Tan, Tianxiang Shao, Shan Shen, Jun Yang:
A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2197-2209 (2021) - [j56]Luchi Hua, Yuan Zhuang, You Li, Qin Wang, Bingpeng Zhou, Longning Qi, Jun Yang, Yue Cao, Harald Haas:
FusionVLP: The Fusion of Photodiode and Camera for Visible Light Positioning. IEEE Trans. Veh. Technol. 70(11): 11796-11811 (2021) - [c46]Xin Si, Yongliang Zhou, Jun Yang, Meng-Fan Chang:
Challenge and Trend of SRAM Based Computation-in-Memory Circuits for AI Edge Devices. ASICON 2021: 1-4 - [c45]Ziyu Li, Weiwei Shan, Chengjun Wu, Haitao Ge, Jun Yang:
An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS. A-SSCC 2021: 1-3 - [c44]Tianzhu Xiong, Yongliang Zhou, Yuyao Kong, Bo Wang, An Guo, Yufei Wang, Chen Xue, Haiming Hsu, Xin Si, Jun Yang:
Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices. ISOCC 2021: 195-196 - [c43]Xiaomin Li, Yibo Xu, Lizheng Ren, Weiwei Ge, Jianlong Cai, Xinning Liu, Jun Yang:
29.8 115nA@3V ULPMark-CP Score 1205 SCVR-Less Dynamic Voltage-Stacking Scheme for IoT MCU. ISSCC 2021: 100-102 - [c42]Yaoru Hou, We Ge, Yanan Guo, Lirida A. B. Naviner, You Wang, Bo Liu, Jun Yang, Hao Cai:
Cryogenic In-MRAM Computing. NANOARCH 2021: 1-6 - [i2]Hao Cai, Yanan Guo, Bo Liu, Mingyang Zhou, Juntong Chen, Xinning Liu, Jun Yang:
Proposal of Analog In-Memory Computing with Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell. CoRR abs/2110.03937 (2021) - 2020
- [j55]Lei Xie, Hao Cai, Chao Wang, Jun Yang:
Towards an automated design flow for memristor based VLSI circuits. Integr. 70: 21-31 (2020) - [j54]Weiwei Shan, Shuai Zhang, Jiaming Xu, Minyi Lu, Longxing Shi, Jun Yang:
Machine Learning Assisted Side-Channel-Attack Countermeasure and Its Application on a 28-nm AES Circuit. IEEE J. Solid State Circuits 55(3): 794-804 (2020) - [j53]Weiwei Shan, Wentao Dai, Liang Wan, Minyi Lu, Longxing Shi, Mingoo Seok, Jun Yang:
A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System. IEEE J. Solid State Circuits 55(3): 826-836 (2020) - [j52]Weiwei Shan, Wentao Dai, Chuan Zhang, Hao Cai, Peiye Liu, Jun Yang, Longxing Shi:
TG-SPP: A One-Transmission-Gate Short-Path Padding for Wide-Voltage-Range Resilient Circuits in 28-nm CMOS. IEEE J. Solid State Circuits 55(5): 1422-1436 (2020) - [j51]Longjie Zhong, Jun Yang, Donglai Xu, Xinquan Lai:
Bandwidth-Enhanced Oversampling Successive Approximation Readout Technique for Low-Noise Power-Efficient MEMS Capacitive Accelerometer. IEEE J. Solid State Circuits 55(9): 2529-2538 (2020) - [j50]Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu, Weisheng Zhao, Jun Yang:
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1602-1614 (2020) - [j49]Yongliang Zhou, Hao Cai, Bo Liu, Weisheng Zhao, Jun Yang:
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing. IEEE Trans. Circuits Syst. 67-II(12): 3352-3356 (2020) - [j48]Bo Liu, Hao Cai, Zhen Wang, Yuhao Sun, Zeyu Shen, Wentao Zhu, Yan Li, Yu Gong, Wei Ge, Jun Yang, Longxing Shi:
A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor. IEEE Trans. Circuits Syst. 67-I(12): 4733-4746 (2020) - [j47]Shan Shen, Tianxiang Shao, Xiaojing Shang, Yichen Guo, Ming Ling, Jun Yang, Longxing Shi:
TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages. IEEE Trans. Very Large Scale Integr. Syst. 28(1): 252-262 (2020) - [c41]Jianxun Yang, Yuyao Kong, Zhao Zhang, Zhuangzhi Liu, Jing Zhou, Yiqi Wang, Yonggang Liu, Chenfu Guo, Te Hu, Congcong Li, Leibo Liu, Jin Zhang, Shaojun Wei, Jun Yang, Shouyi Yin:
A Time-Domain Computing-in-Memory based Processor using Predictable Decomposed Convolution for Arbitrary Quantized DNNs. A-SSCC 2020: 1-4 - [c40]Shan Shen, Tianxiang Shao, Ming Ling, Jun Yang, Longxing Shi:
Modeling and Designing of a PVT Auto-tracking Timing-speculative SRAM. DATE 2020: 1073-1078 - [c39]Zhixi Yang, Honglan Jiang, Xianbin Li, Jun Yang:
Power-Efficient Approximate Multiplier Using Adaptive Error Compensation. ACM Great Lakes Symposium on VLSI 2020: 205-210 - [c38]Jingjing Guo, Peng Cao, Mengxiao Li, Zhiyuan Liu, Jun Yang:
Statistical Timing Model for Subthreshold Circuit with Correlated Variation Consideration. ISCAS 2020: 1-5 - [c37]Weiwei Shan, Minhao Yang, Jiaming Xu, Yicheng Lu, Shuai Zhang, Tao Wang, Jun Yang, Longxing Shi, Mingoo Seok:
14.1 A 510nW 0.41V Low-Memory Low-Computation Keyword-Spotting Chip Using Serial FFT-Based MFCC and Binarized Depthwise Separable Convolutional Neural Network in 28nm CMOS. ISSCC 2020: 230-232 - [c36]Dibei Chen, Zhaoshi Li, Tianzhu Xiong, Zhiwei Liu, Jun Yang, Shouyi Yin, Shaojun Wei, Leibo Liu:
CATCAM: Constant-time Alteration Ternary CAM with Scalable In-Memory Architecture. MICRO 2020: 342-355
2010 – 2019
- 2019
- [j46]Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang:
A Review of Sparse Recovery Algorithms. IEEE Access 7: 1300-1322 (2019) - [j45]Ming Ling, Xiaojing Shang, Shan Shen, Tianxiang Shao, Jun Yang:
Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM. IEEE Access 7: 111649-111661 (2019) - [j44]Yuan Zhuang, Qin Wang, Min Shi, Pan Cao, Longning Qi, Jun Yang:
Low-Power Centimeter-Level Localization for Indoor Mobile Robots Based on Ensemble Kalman Smoother Using Received Signal Strength. IEEE Internet Things J. 6(4): 6513-6522 (2019) - [j43]Bo Liu, Zhen Wang, Shisheng Guo, Huazhen Yu, Yu Gong, Jun Yang, Longxing Shi:
An energy-efficient voice activity detector using deep neural networks and approximate computing. Microelectron. J. 87: 12-21 (2019) - [j42]Yuan Zhuang, Qin Wang, You Li, Zhouzheng Gao, Bingpeng Zhou, Longning Qi, Jun Yang, Ruizhi Chen, Naser El-Sheimy:
The Integration of Photodiode and Camera for Visible Light Positioning by Using Fixed-Lag Ensemble Kalman Smoother. Remote. Sens. 11(11): 1387 (2019) - [j41]Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao:
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 239-250 (2019) - [j40]Weiwei Shan, Xinchao Shang, Xing Wan, Hao Cai, Chuan Zhang, Jun Yang:
A Wide-Voltage-Range Half-Path Timing Error-Detection System With a 9-Transistor Transition-Detector in 40-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2288-2297 (2019) - [j39]Yuan Zhuang, Luchi Hua, Qin Wang, Yue Cao, Zhouzheng Gao, Longning Qi, Jun Yang, John Thompson:
Visible Light Positioning and Navigation Using Noise Measurement and Mitigation. IEEE Trans. Veh. Technol. 68(11): 11094-11106 (2019) - [c35]Hao Cai, Menglin Han, Weiwei Shan, Jun Yang, You Wang, Wang Kang, Weisheng Zhao:
Voltage-Controlled Magnetoelectric Memory Bit-cell Design With Assisted Body-bias in FD-SOI. ACM Great Lakes Symposium on VLSI 2019: 135-140 - [c34]Peng Cao, Jiangping Wu, Zhiyuan Liu, Jingjing Guo, Jun Yang, Longxing Shi:
A Statistical Current and Delay Model Based on Log-Skew-Normal Distribution for Low Voltage Region. ACM Great Lakes Symposium on VLSI 2019: 323-326 - [c33]Yuyao Kong, Jun Yang:
In-memory Processing based on Time-domain Circuit. ACM Great Lakes Symposium on VLSI 2019: 435-438 - [c32]Peng Cao, Zhiyuan Liu, Jiangping Wu, Jingjing Guo, Jun Yang, Longxing Shi:
A Statistical Timing Model for Low Voltage Design Considering Process Variation. ICCAD 2019: 1-8 - [c31]Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang:
Deep Learning Approaches for Sparse Recovery in Compressive Sensing. ISPA 2019: 129-134 - [c30]Jun Yang, Yuyao Kong, Zhen Wang, Yan Liu, Bo Wang, Shouyi Yin, Longxin Shi:
Sandwich-RAM: An Energy-Efficient In-Memory BWN Architecture with Pulse-Width Modulation. ISSCC 2019: 394-396 - [c29]Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang, Jun Yang, Jie Han, Leibo Liu, Weisheng Zhao:
Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. ISVLSI 2019: 111-115 - [c28]Xiaojing Shang, Ming Ling, Shan Shen, Tianxiang Shao, Jun Yang:
RRS cache: a low voltage cache based on timing speculation SRAM with a reuse-aware cacheline remapping mechanism. MEMSYS 2019: 451-458 - [c27]Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang, Lirida A. B. Naviner:
Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM. NANOARCH 2019: 1-6 - [c26]Lei Xie, Hao Cai, Jun Yang:
REAL: Logic and Arithmetic Operations Embedded in RRAM for General-Purpose Computing. NANOARCH 2019: 1-4 - [c25]Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu, Jun Yang:
A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement. NANOARCH 2019: 1-6 - [c24]Peng Cao, Zhiyuan Liu, Jingjing Guo, Haoyu Pang, Jiangping Wu, Jun Yang:
Accurate and Efficient Interdependent Timing Model for Flip-Flop in Wide Voltage Region. NEWCAS 2019: 1-4 - [c23]Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang:
Nonlinear Functions in Learned Iterative Shrinkage-Thresholding Algorithm for Sparse Signal Recovery. SiPS 2019: 324-329 - [c22]Weiwei Shan, Ao Fan, Jiaming Xu, Jun Yang, Mingoo Seok:
A 923 Gbps/W, 113-Cycle, 2-Sbox Energy-efficient AES Accelerator in 28nm CMOS. VLSI Circuits 2019: 236- - [i1]Shan Shen, Tianxiang Shao, Xiaojing Shang, Yichen Guo, Ming Ling, Jun Yang, Longxing Shi:
TS Cache: A Fast Cache with Timing-speculation Mechanism Under Low Supply Voltages. CoRR abs/1904.11200 (2019) - 2018
- [j38]Weiwei Shan, Xinning Liu, Minyi Lu, Liang Wan, Jun Yang:
A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits. IEEE Access 6: 138-145 (2018) - [j37]Luchi Hua, Yuan Zhuang, Longning Qi, Jun Yang, Longxing Shi:
Noise Analysis and Modeling in Visible Light Communication Using Allan Variance. IEEE Access 6: 74320-74327 (2018) - [j36]Yuan Zhuang, Luchi Hua, Longning Qi, Jun Yang, Pan Cao, Yue Cao, Yongpeng Wu, John Thompson, Harald Haas:
A Survey of Positioning Systems Using Visible LED Lights. IEEE Commun. Surv. Tutorials 20(3): 1963-1988 (2018) - [j35]Zhikuang Cai, Haobo Xu, Jian Xiao, Jun Yang:
An improved BIJM circuit based on undersampling technique. IEICE Electron. Express 15(8): 20180124 (2018) - [j34]Zhen Wang, Mengwen Xia, Bo Liu, Xing Ruan, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier. IEICE Electron. Express 15(8): 20180212 (2018) - [j33]Yuan Zhuang, Yue Cao, Naser El-Sheimy, Jun Yang:
Guest Editorial: Special Issue on Toward Positioning, Navigation, and Location-Based Services (PNLBS) for Internet of Things. IEEE Internet Things J. 5(6): 4613-4615 (2018) - [j32]Yuan Zhuang, Jun Yang, Longning Qi, You Li, Yue Cao, Naser El-Sheimy:
A Pervasive Integration Platform of Low-Cost MEMS Sensors and Wireless Signals for Indoor Localization. IEEE Internet Things J. 5(6): 4616-4631 (2018) - [j31]Jun Yang, Hao Ji, Yichen Guo, Jizhe Zhu, Yuan Zhuang, Zhi Li, Xinning Liu, Longxing Shi:
A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM. IEEE J. Solid State Circuits 53(8): 2415-2426 (2018) - [j30]Zhen Wang, Yuan Zhuang, Jun Yang, Hengfeng Zhang, Wei Dong, Min Wang, Luchi Hua, Bo Liu, Longxing Shi:
A Double Dwell High Sensitivity GPS Acquisition Scheme Using Binarized Convolution Neural Network. Sensors 18(5): 1482 (2018) - [j29]Weiwei Shan, Xinchao Shang, Longxing Shi, Wentao Dai, Jun Yang:
Timing Error Prediction AVFS With Detection Window Tuning for Wide-Operating-Range ICs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 933-937 (2018) - [j28]Weiwei Shan, Liang Wan, Xinning Liu, Xinchao Shang, Wentao Dai, Shuai Shao, Jun Yang, Longxing Shi:
A Low Overhead, Within-a-Cycle Adaptive Clock Stretching Circuit With Wide Operating Range in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1718-1722 (2018) - [j27]Wentao Dai, Weiwei Shan, Xinchao Shang, Xinning Liu, Hao Cai, Jun Yang:
HTD: A Light-Weight Holosymmetrical Transition Detector for Wide-Voltage-Range Variation Resilient ICs. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3907-3917 (2018) - [c21]Menglin Han, Hao Cai, Jun Yang, Lirida A. B. Naviner, You Wang, Weisheng Zhao:
Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. APCCAS 2018: 386-389 - [c20]Xinchao Shang, Weiwei Shan, Jiaming Xu, Minyi Lu, Yiming Xiang, Longxing Shi, Jun Yang:
A 0.46V-1.1V Transition-Detector with In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in AES Accelerator. A-SSCC 2018: 1-4 - [c19]Shan-shan Zhu, Hai Qin, Bo Liu, Jun Yang:
Design and Optimization of Reconfigurable Data Path for Communication Baseband Signal Processing. CyberC 2018 - [c18]Xiao Shi, Fengyuan Liu, Jun Yang, Lei He:
A fast and robust failure analysis of memory circuits using adaptive importance sampling method. DAC 2018: 134:1-134:6 - [c17]Hao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao:
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power. DCIS 2018: 1-5 - [c16]Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing. DSP 2018: 1-5 - [c15]Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang:
Compressed Sensing for Wideband HF Channel Estimation. ICFSP 2018: 1-5 - [c14]Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao:
Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. ISCAS 2018: 1-5 - [c13]Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao:
MRAM-on-FDSOI Integration: A Bit-Cell Perspective. ISVLSI 2018: 263-268 - [c12]Shenghua Chen, Wei Ge, Jinjiang Yang, Bo Liu, Jun Yang:
A Power Analysis Attack Countermeasure Based on Random Execution. TrustCom/BigDataSE 2018: 1474-1479 - 2017
- [j26]Weiwei Shan, Longxing Shi, Jun Yang:
In-Situ Timing Monitor-Based Adaptive Voltage Scaling System for Wide-Voltage-Range Applications. IEEE Access 5: 15831-15838 (2017) - [j25]Chao Wang, Peng Cao, Bo Liu, Jun Yang:
Coarse-grained reconfigurable architecture with hierarchical context cache structure and management approach. IEICE Electron. Express 14(6): 20170090 (2017) - [j24]Jingjing Guo, Jizhe Zhu, Min Wang, Jianxin Nie, Xinning Liu, Wei Ge, Jun Yang:
Analytical inverter chain's delay and its variation model for sub-threshold circuits. IEICE Electron. Express 14(11): 20170390 (2017) - [j23]Chao Wang, Peng Cao, Jun Yang:
Efficient AES cipher on coarse-grained reconfigurable architecture. IEICE Electron. Express 14(11): 20170449 (2017) - [j22]Weiwei Shan, Xinning Liu, Minyi Lu, Shuai Shao, Zhikuang Cai, Jun Yang:
An improved timing error prediction monitor for wide adaptive frequency scaling. IEICE Electron. Express 14(21): 20170808 (2017) - [j21]Peng Cao, Bo Liu, Jinjiang Yang, Jun Yang, Meng Zhang, Longxing Shi:
Context Management Scheme Optimization of Coarse-Grained Reconfigurable Architecture for Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(8): 2321-2331 (2017) - [c11]Xinchao Shang, Weiwei Shan, Longxing Shi, Xing Wan, Jun Yang:
A 0.44V-1.1V 9-transistor transition-detector and half-path error detection technique for low power applications. A-SSCC 2017: 205-208 - [c10]Wentao Dai, Weiwei Shan, Xinning Liu, Jun Yang:
HTD: A light-weight holosymmetrical transition detector based in-situ timing monitoring technique for wide-voltage-range in 40nm CMOS. A-SSCC 2017: 209-212 - [c9]Jingjing Guo, Min Wang, Jizhe Zhu, Xinning Liu, Jun Yang:
Analytical hold timing fixing for sub-threshold circuit based on its lognormal distribution. PATMOS 2017: 1-8 - [c8]Yu Gong, Tingting Xu, Bo Liu, Wei Ge, Jinjiang Yang, Jun Yang, Longxing Shi:
Processing LSTM in memory using hybrid network expansion model. SiPS 2017: 1-6 - [c7]Bo Liu, Xing Ruan, Mengwen Xia, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang:
An energy-efficient accelerator for hybrid bit-width DNNs. SSCI 2017: 1-8 - 2016
- [j20]Jinjiang Yang, Ge Wei, Peng Cao, Jun Yang:
An area-efficient design of reconfigurable S-box for parallel implementation of block ciphers. IEICE Electron. Express 13(11): 20160138 (2016) - [j19]Ge Wei, Jinjiang Yang, Jun Yang:
High performance and area efficiency design of global register file for coarse-grained reconfigurable cryptographic processor. IEICE Electron. Express 13(15): 20160545 (2016) - [j18]Yuan Zhuang, Jun Yang, You Li, Longning Qi, Naser El-Sheimy:
Smartphone-Based Indoor Localization with Bluetooth Low Energy Beacons. Sensors 16(5): 596 (2016) - 2015
- [j17]Xinning Liu, Yuxiang Niu, Jun Yang, Peng Cao:
A GPS Bit Synchronization Method Based on Frequency Compensation. IEICE Trans. Commun. 98-B(4): 746-753 (2015) - [j16]Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei:
An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding. IEEE Trans. Multim. 17(10): 1706-1720 (2015) - [j15]Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei:
Correction to "An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding". IEEE Trans. Multim. 17(12): 2354-2355 (2015) - 2014
- [j14]Zhen Xie, Yang Zhang, Jun Yang, Longxing Shi:
An improved memory system simulator based on DRAMSim2. IEICE Electron. Express 11(14): 20140466 (2014) - [j13]Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei:
On-Chip Memory Hierarchy in One Coarse-Grained Reconfigurable Architecture to Compress Memory Space and to Reduce Reconfiguration Time and Data-Reference Time. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 983-994 (2014) - [c6]Weiwei Shan, Longxing Shi, Xingyuan Fu, Xiao Zhang, Chaoxuan Tian, Zhipeng Xu, Jun Yang, Jie Li:
A Side-channel Analysis Resistant Reconfigurable Cryptographic Coprocessor Supporting Multiple Block Cipher Algorithms. DAC 2014: 176:1-176:6 - 2013
- [j12]Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei:
Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture. Sci. China Inf. Sci. 56(11): 1-20 (2013) - [j11]Zhikuang Cai, Haobo Xu, Shixuan Que, Weiwei Shan, Jun Yang:
On-chip long-term jitter measurement for PLL based on undersampling technique. IEICE Electron. Express 10(24): 20130887 (2013) - [j10]Hung K. Nguyen, Peng Cao, Xuexiang Wang, Jun Yang, Longxing Shi, Min Zhu, Leibo Liu, Shaojun Wei:
Hardware Software Co-design of H.264 Baseline Encoder on Coarse-Grained Dynamically Reconfigurable Computing System-on-Chip. IEICE Trans. Inf. Syst. 96-D(3): 601-615 (2013) - [j9]Gugang Gao, Peng Cao, Jun Yang, Longxing Shi:
Parallelism Analysis of H.264 Decoder and Realization on a Coarse-Grained Reconfigurable SoC. IEICE Trans. Inf. Syst. 96-D(8): 1654-1666 (2013) - [j8]Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei:
The Organization of On-Chip Data Memory in One Coarse-Grained Reconfigurable Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(11): 2218-2229 (2013) - [j7]Jun Yang, Weiwei Shan, Junyin Liu, Huafang Sun:
Implementation of correlation power analysis attack on an FPGA DES design. Int. J. Inf. Commun. Technol. 5(3/4): 296-306 (2013) - [j6]Chen Mei, Min Li, Peng Cao, Amir Amin, Chunshu Li, Jun Yang, Antoine Dejonghe, Liesbet Van der Perre, Longxing Shi, Sofie Pollin:
Exploration of Full HD Media Decoding on a Software Defined Radio Baseband Processor. IEEE Trans. Signal Process. 61(18): 4438-4449 (2013) - 2012
- [j5]Jian Xiao, Jinguo Zhang, Min Zhu, Jun Yang, Longxing Shi:
Fast AdaBoost-Based Face Detection System on a Dynamically Coarse Grain Reconfigurable Architecture. IEICE Trans. Inf. Syst. 95-D(2): 392-402 (2012) - [j4]Bo Liu, Peng Cao, Min Zhu, Jun Yang, Leibo Liu, Shaojun Wei, Longxing Shi:
Reconfiguration Process Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications. IEICE Trans. Inf. Syst. 95-D(7): 1858-1871 (2012) - [c5]Chen Mei, Min Li, Peng Cao, Amir Amin, Chunshu Li, Sofie Pollin, Jun Yang:
Exploration of Full HD Media Decoding on SDR Baseband Processor. SiPS 2012: 185-190 - 2011
- [j3]Xin Chen, Jun Yang, Longxing Shi:
A Fast Locking All-Digital Phase-Locked Loop via Feed-Forward Compensation Technique. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 857-868 (2011)
2000 – 2009
- 2009
- [j2]Xuexiang Wang, Hanlai Pu, Jun Yang, Longxing Shi:
Extended Control Flow Graph Based Performance and Energy Consumption Optimization Using Scratch-Pad Memory. J. Circuits Syst. Comput. 18(4): 697-711 (2009) - [c4]Peng Cao, Chao Wang, Jun Yang, Longxing Shi:
Area-efficient line-based two-dimensional discrete wavelet transform architecture without data buffer. ICME 2009: 1094-1097 - 2008
- [j1]Xin Chen, Jun Yang, Longxing Shi:
A Novel Fast-Lock-in Digitally Controlled Phase-Locked Loop. IEICE Trans. Electron. 91-C(12): 1971-1975 (2008) - 2005
- [c3]Chun Luo, Jun Yang, Gugang Gao, Longxing Shi:
Domain fault model and coverage metric for SoC verification. ISCAS (6) 2005: 5662-5665 - [c2]Chun Luo, Jun Yang, Longxing Shi, Xufan Wu, Yu Zhang:
Domain Strategy and Coverage Metric for Validation. ISQED 2005: 40-45 - [c1]Xufan Wu, Jun Yang, Longxing Shi:
Bus Buffer Evaluation of Different Arbitration Algorithms. SoCC 2005: 261-264
Coauthor Index
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