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ORCIDPinaki Mazumder
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- affiliation: University of Michigan, Ann Arbor, USA
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2020 – today
- 2024
[i4]Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder:
Non-binary dynamical Ising machines for combinatorial optimization. CoRR abs/2412.08481 (2024)- 2023
- [j64]Aditya Shukla
, Mikhail Erementchouk, Pinaki Mazumder:
Custom CMOS Ising Machine Based on Relaxed Burer-Monteiro-Zhang Heuristic. IEEE Trans. Computers 72(10): 2835-2846 (2023) - [i3]Mikhail Erementchouk, Aditya Shukla, Pinaki Mazumder:
Self-contained relaxation-based dynamical Ising machines. CoRR abs/2305.06414 (2023) - [i2]Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David M. Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine:
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR abs/2311.02055 (2023) - 2022
- [j63]Xiangxiang Wang, Yongbin Yu, Jingye Cai, Shouming Zhong, Nijing Yang, Kaibo Shi, Pinaki Mazumder, Tashi Nyima:
Dynamic Pinning Synchronization of Fuzzy-Dependent-Switched Coupled Memristive Neural Networks With Mismatched Dimensions on Time Scales. IEEE Trans. Fuzzy Syst. 30(3): 779-793 (2022) - [i1]Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder:
Scalable almost-linear dynamical Ising machines. CoRR abs/2205.14760 (2022) - 2021
- [j62]Anindya Banerjee, Sankar Basu, Erik Brunvand, Pinaki Mazumder, Rance Cleaveland, Gurdip Singh, Margaret Martonosi, Fernanda Pembleton:
Navigating the Seismic Shift of Post-Moore Computer Systems Design. IEEE Micro 41(6): 162-167 (2021) - 2020
- [j61]Carlo Ottaviani, Matthew J. Woolley, Misha Erementchouk, John F. Federici, Pinaki Mazumder, Stefano Pirandola, Christian Weedbrook:
Terahertz Quantum Cryptography. IEEE J. Sel. Areas Commun. 38(3): 483-495 (2020) - [c82]Yongbin Yu, Favour Ekong, Pinaki Mazumder:
Convolutional Neural Network Design for Breast Cancer Medical Image Classification. ICCT 2020: 1325-1332 - [c81]Md. Faizul Bari, Soumitra Roy Joy, Md. Zunaid Baten, Pinaki Mazumder:
Process Variation in Spoof Plasmon Interconnect: Consequences and Compensations. RWS 2020: 283-286
2010 – 2019
- 2019
- [j60]Soumitra Roy Joy, Mikhail Erementchouk, Hao Yu, Pinaki Mazumder:
Spoof Plasmon Interconnects - Communications Beyond RC Limit. IEEE Trans. Commun. 67(1): 599-610 (2019) - 2018
- [j59]Nan Zheng, Pinaki Mazumder:
A Scalable Low-Power Reconfigurable Accelerator for Action-Dependent Heuristic Dynamic Programming. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1897-1908 (2018) - [j58]Nan Zheng, Pinaki Mazumder:
Online Supervised Learning for Hardware-Based Multilayer Spiking Neural Networks Through the Modulation of Weight-Dependent Spike-Timing-Dependent Plasticity. IEEE Trans. Neural Networks Learn. Syst. 29(9): 4287-4302 (2018) - [c80]Nan Zheng, Pinaki Mazumder:
A Low-Power Hardware Architecture for On-Line Supervised Learning in Multi-Layer Spiking Neural Networks. ISCAS 2018: 1-5 - [c79]Nan Zheng, Pinaki Mazumder:
A Low-Power Circuit for Adaptive Dynamic Programming. VLSID 2018: 192-197 - 2017
- [j57]Jaeyoung Kim, Pinaki Mazumder:
A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS. Integr. 57: 1-10 (2017) - [j56]Nan Zheng, Pinaki Mazumder:
Hardware-Friendly Actor-Critic Reinforcement Learning Through Modulation of Spike-Timing-Dependent Plasticity. IEEE Trans. Computers 66(2): 299-311 (2017) - [j55]Nan Zheng, Pinaki Mazumder:
An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 580-584 (2017) - [j54]Jaeyoung Kim, Pinaki Mazumder:
Energy-Efficient Hardware Architecture of Self-Organizing Map for ECG Clustering in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1097-1101 (2017) - [j53]Nan Zheng, Pinaki Mazumder:
Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10): 2726-2736 (2017) - 2016
- [j52]Pinaki Mazumder, D. Hu, Idongesit E. Ebong, Xu Zhang, Z. Xu, Silvia Ferrari:
Digital implementation of a virtual insect trained by spike-timing dependent plasticity. Integr. 54: 109-117 (2016) - 2015
- [j51]Shukai Duan, Xiaofang Hu, Zhekang Dong, Lidan Wang, Pinaki Mazumder:
Memristor-Based Cellular Nonlinear/Neural Network: Design, Analysis, and Applications. IEEE Trans. Neural Networks Learn. Syst. 26(6): 1202-1213 (2015) - 2014
- [c78]Nan Zheng, Jaeyoung Kim, Pinaki Mazumder:
A low-power reconfigurable CMOS power amplifier for wireless sensor network applications. ISCAS 2014: 1086-1089 - 2013
- [j50]Woo Hyung Lee, Pinaki Mazumder:
Color image processing with multi-peak resonant tunneling diodes. ACM J. Emerg. Technol. Comput. Syst. 9(3): 18:1-18:20 (2013) - [j49]Yalcin Yilmaz, Pinaki Mazumder:
Nonvolatile Nanopipelining Logic Using Multiferroic Single-Domain Nanomagnets. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1181-1188 (2013) - [c77]Jaeyoung Kim, Kwen-Siong Chong, Joseph Sylvester Chang, Pinaki Mazumder:
A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOS. ACM Great Lakes Symposium on VLSI 2013: 83-88 - 2012
- [j48]Shukai Duan, Xiaofang Hu, Lidan Wang, Chuandong Li, Pinaki Mazumder:
Memristor-based RRAM with applications. Sci. China Inf. Sci. 55(6): 1446-1460 (2012) - [j47]Pinaki Mazumder, Sung-Mo Kang, Rainer Waser:
Memristors: Devices, Models, and Applications [Scanning the Issue]. Proc. IEEE 100(6): 1911-1919 (2012) - [j46]Idongesit E. Ebong, Pinaki Mazumder:
CMOS and Memristor-Based Neural Network Design for Position Detection. Proc. IEEE 100(6): 2050-2060 (2012) - [c76]Kwen-Siong Chong, Joseph S. Chang, Idongesit E. Ebong, Yalcin Yilmaz, Pinaki Mazumder:
Comparison of FFT/IFFT Designs Utilizing Different Low Power Techniques. ISED 2012: 116-119 - 2011
- [j45]Alfredo Benso, Yiorgos Makris, Pinaki Mazumder:
Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers 60(4): 450-451 (2011) - [c75]Yalcin Yilmaz, Pinaki Mazumder:
Threshold Read Method for Multi-bit Memristive Crossbar Memory. ISED 2011: 217-222
2000 – 2009
- 2009
- [j44]Pinaki Mazumder, Sing-Rong Li, Idongesit E. Ebong:
Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 487-495 (2009) - [c74]Baohua Wang, Pinaki Mazumder:
An accurate interconnect thermal model using equivalent transmission line circuit. DATE 2009: 280-283 - [c73]Pinaki Mazumder:
Disruptive technologies and neurally-inspired architectures. ACM Great Lakes Symposium on VLSI 2009: 283-284 - 2007
- [j43]Baohua Wang, Pinaki Mazumder:
Accelerated Chip-Level Thermal Analysis Using Multilayer Green's Function. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2): 325-344 (2007) - [j42]Qinwei Xu, Pinaki Mazumder:
Efficient Modeling of Transmission Lines With Electromagnetic Wave Coupling by Using the Finite Difference Quadrature Method. IEEE Trans. Very Large Scale Integr. Syst. 15(12): 1289-1302 (2007) - 2006
- [c72]Woo Hyung Lee, Pinaki Mazumder:
Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder. ASAP 2006: 182-185 - [c71]Baohua Wang, Pinaki Mazumder:
Optimization of circuit trajectories: an auxiliary network approach. ASP-DAC 2006: 416-421 - [c70]Baohua Wang, Pinaki Mazumder:
A logarithmic full-chip thermal analysis algorithm based on multi-layer Green's function. DATE 2006: 39-44 - [c69]Baohua Wang, Pinaki Mazumder:
Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach. VLSI Design 2006: 349-354 - 2005
- [c68]Baohua Wang, Pinaki Mazumder:
EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation. DATE 2005: 976-981 - [c67]Woo Hyung Lee, Pinaki Mazumder:
New logic circuits consisting of quantum dots and CMOS. ECCTD 2005: 135-138 - [c66]Hui Zhang, Pinaki Mazumder:
Design of a new sense amplifier flip-flop with improved power-delay-product. ISCAS (2) 2005: 1262-1265 - [c65]Baohua Wang, Pinaki Mazumder:
Integrating lumped networks into full wave TLM/FDTD methods using passive discrete circuit models. ISCAS (3) 2005: 1948-1951 - [c64]Sing-Rong Li, Pinaki Mazumder, Kyounghoon Yang:
On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]. ISCAS (3) 2005: 2531-2534 - [c63]Baohua Wang, Pinaki Mazumder:
Multivariate Normal Distribution Based Statistical Timing Analysis Using Global Projection and Local Expansion. VLSI Design 2005: 380-385 - 2004
- [j41]Li Ding, Pinaki Mazumder:
On circuit techniques to improve noise immunity of CMOS dynamic logic. IEEE Trans. Very Large Scale Integr. Syst. 12(9): 910-925 (2004) - [c62]Li Ding, Pinaki Mazumder:
A novel technique to improve noise immunity of CMOS dynamic logic circuits. DAC 2004: 900-903 - [c61]Qinwei Xu, Pinaki Mazumder:
Modeling of transmission lines with EM wave coupling by the finite difference quadrature method. ACM Great Lakes Symposium on VLSI 2004: 25-28 - [c60]Sing-Rong Li, Pinaki Mazumder, Leon O. Chua:
On the implementation of RTD based CNNs. ISCAS (3) 2004: 25-28 - [c59]Baohua Wang, Pinaki Mazumder:
Fast thermal analysis for VLSI circuits via semi-analytical Green's function in multi-layer materials. ISCAS (2) 2004: 409-412 - [c58]Hui Zhang, Pinaki Mazumder, Kyounghoon Yang:
Resonant tunnelling diode based QMOS edge triggered flip-flop design. ISCAS (3) 2004: 705-708 - [c57]Baohua Wang, Pinaki Mazumder:
On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED 2004: 236-239 - [c56]Baohua Wang, Pinaki Mazumder:
On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED 2004: 332-337 - [c55]Li Ding, Pinaki Mazumder:
Dynamic Noise Margin: Definitions and Model. VLSI Design 2004: 1001- - 2003
- [j40]Li Ding, David T. Blaauw, Pinaki Mazumder:
Accurate crosstalk noise modeling for early signal integrity analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5): 627-634 (2003) - [j39]Qinwei Xu, Pinaki Mazumder:
Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1068-1079 (2003) - [j38]Li Ding, Pinaki Mazumder:
Simultaneous switching noise analysis using application specific device modeling. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1146-1152 (2003) - [c54]Li Ding, Pinaki Mazumder:
Modeling Noise Transfer Characteristic of Dynamic Logic Gates. DATE 2003: 11114-11117 - [c53]Baohua Wang, Pinaki Mazumder:
Subgridding method for speeding up FD-TLM circuit simulation. ISCAS (3) 2003: 20-23 - [c52]Qinwei Xu, Pinaki Mazumder:
Efficient interconnect modeling by Finite Difference Quadrature methods. ISCAS (4) 2003: 592-595 - [c51]Hui Zhang, Pinaki Mazumder, Li Ding, Kyounghoon Yang:
Performance modeling of resonant tunneling based RAMs. ISCAS (4) 2003: 900-903 - [c50]Li Ding, Pinaki Mazumder:
The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance. VLSI Design 2003: 234- - [c49]Alejandro F. González, Pinaki Mazumder:
Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. VLSI Design 2003: 493-492 - 2002
- [c48]Li Ding, Pinaki Mazumder:
Optimal Transistor Tapering for High-Speed CMOS Circuits. DATE 2002: 708-713 - [c47]Qinwei Xu, Pinaki Mazumder:
Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects. DATE 2002: 820-825 - [c46]Li Ding, Pinaki Mazumder:
Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling. DATE 2002: 1038-1043 - [c45]Qinwei Xu, Pinaki Mazumder:
Novel interconnect modeling by using high-order compact finite difference methods. ACM Great Lakes Symposium on VLSI 2002: 148-152 - [c44]Li Ding, David T. Blaauw, Pinaki Mazumder:
Efficient crosstalk noise modeling using aggressor and tree reductions. ICCAD 2002: 595-600 - [c43]Qinwei Xu, Pinaki Mazumder, Li Ding:
Novel macromodeling for on-chip RC/RLC interconnects. ISCAS (4) 2002: 189-192 - [c42]Li Ding, Pinaki Mazumder:
Modified long channel model for analytical study of DSM circuits. ISCAS (5) 2002: 541-544 - [c41]Li Ding, Pinaki Mazumder, David T. Blaauw:
Crosstalk noise estimation using effective coupling capacitance. ISCAS (5) 2002: 645-648 - [c40]Tetsuya Uemura, Pinaki Mazumder:
Rise time analysis of MOBILE circuit. ISCAS (5) 2002: 864-867 - [c39]Qinwei Xu, Pinaki Mazumder:
Rational ABCD Modeling of High-Speed Interconnects. ASP-DAC/VLSI Design 2002: 147- - [c38]Qinwei Xu, Pinaki Mazumder:
Efficient Macromodeling for On-Chip Interconnects. ASP-DAC/VLSI Design 2002: 561-566 - 2001
- [j37]Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder:
CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices. IEEE J. Solid State Circuits 36(6): 924-932 (2001) - [j36]Mayukh Bhattacharya, Pinaki Mazumder:
Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1): 39-50 (2001) - [j35]Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta:
A physical design tool for built-in self-repairable RAMs. IEEE Trans. Very Large Scale Integr. Syst. 9(2): 352-364 (2001) - [c37]Qinwei Xu, Pinaki Mazumder:
Efficient and passive modeling of transmission lines by using differential quadrature method. DATE 2001: 437-444 - [c36]Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González, Pinaki Mazumder:
A 250-MHz, 32-bit quantum MOS correlator prototype. ICECS 2001: 1501-1504 - [c35]Li Ding, Pinaki Mazumder, N. Srinivas:
A dual-rail static edge-triggered latch. ISCAS (2) 2001: 645-648 - [c34]Qinwei Xu, Pinaki Mazumder, Mayukh Bhattacharya:
Modeling of Nonuniform Interconnects by Using Differential Quadrature Method. VLSI Design 2001: 327-332 - [c33]Qinwei Xu, Pinaki Mazumder, Zheng-Fan Li:
Transmission Line Modeling by Modified Method of Characteristics. VLSI Design 2001: 359-364 - [c32]Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax:
Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. VLSI Design 2001: 470-474 - 2000
- [j34]Kanad Chakraborty, Pinaki Mazumder:
New March Tests for Multiport RAM Devices. J. Electron. Test. 16(4): 389-395 (2000) - [j33]Alejandro F. González, Pinaki Mazumder:
Redundant arithmetic, algorithms and implementations. Integr. 30(1): 13-53 (2000) - [c31]Mayukh Bhattacharya, Shriram Kulkarni, Alejandro F. González, Pinaki Mazumder:
A prototyping technique for large-scale RTD-CMOS circuits. ISCAS 2000: 635-638 - [c30]Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder:
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. ISMVL 2000: 323-330 - [c29]Mayukh Bhattacharya, Pinaki Mazumder:
Convergence Issues in Resonant Tunneling Diode Circuit Simulation. VLSI Design 2000: 499-
1990 – 1999
- 1999
- [j32]Alan C. Seabaugh, Pinaki Mazumder:
Special Issue On Quantum Devices And Their Applications. Proc. IEEE 87(4): 535-536 (1999) - [c28]Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder:
A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE 1999: 714- - [c27]Tetsuya Uemura, Pinaki Mazumder:
Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit. Great Lakes Symposium on VLSI 1999: 158-161 - [c26]Patrick Fay, Gary H. Bernstein, David H. Chow, Joel N. Schulman, Pinaki Mazumder, William Williamson III, Barry K. Gilbert:
Integration of InAs/AlSb/GaSb Resonant Interband Tunneling Diodes with Heterostructure Field-Effect Transistors for Ultra-High-Speed Digital Circuit Applications. Great Lakes Symposium on VLSI 1999: 162-165 - 1998
- [j31]Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder:
FTROM: A Silicon Compiler for Fault-tolerant ROMs. Integr. 26(1-2): 117-140 (1998) - [j30]Jian Ping Sun, George I. Haddad, Pinaki Mazumder, Joel N. Schulman:
Resonant tunneling diodes: models and properties. Proc. IEEE 86(4): 641-660 (1998) - [j29]Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Jian Ping Sun, George I. Haddad:
Digital circuit applications of resonant tunneling devices. Proc. IEEE 86(4): 664-686 (1998) - [j28]Alejandro F. González, Pinaki Mazumder:
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices. IEEE Trans. Computers 47(9): 947-959 (1998) - [j27]Pinaki Mazumder:
Guest Editorial Special Section On Impacts Of Emerging Technologies On VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 6(1): 4-5 (1998) - [c25]Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder:
A Silicon Compiler for Fault-Tolerant ROMs. DFT 1998: 270-275 - [c24]Mayukh Bhattacharya, Pinaki Mazumder:
Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. Great Lakes Symposium on VLSI 1998: 65-70 - [c23]Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González:
Circuit Design using Resonant Tunneling Diodes. VLSI Design 1998: 501-506 - [c22]Pinaki Mazumder:
Analysis of Failures in Deep Submicron SRAM Cells. VTS 1998: 184-187 - 1997
- [c21]Alejandro F. González, Pinaki Mazumder:
Compact Signed-Digit Adder Using Multiple-Valued Logic. ARVLSI 1997: 96-113 - [c20]Kanad Chakraborty, Pinaki Mazumder:
A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. ED&TC 1997: 330-334 - 1996
- [j26]H. L. Chan, Sundarar Mohan, Pinaki Mazumder, George I. Haddad:
Compact multiple-valued multiplexers using negative differential resistance devices. IEEE J. Solid State Circuits 31(8): 1151-1156 (1996) - [j25]Michael D. Smith, Pinaki Mazumder:
Generation of Minimal Vertex Covers for Row/Column Allocation in Self-Repairable Arrays. IEEE Trans. Computers 45(1): 109-115 (1996) - [c19]Kanad Chakraborty, Pinaki Mazumder:
An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. ICCAD 1996: 685-688 - [c18]Shriram Kulkarni, Pinaki Mazumder, George I. Haddad:
A high-speed 32-bit parallel correlator for spread spectrum communication. VLSI Design 1996: 313-315 - 1995
- [j24]Sundarar Mohan, Jian Ping Sun, Pinaki Mazumder, George I. Haddad:
Device and circuit simulation of quantum electronic devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(6): 653-662 (1995) - [c17]Khushro Shahookar, Pinaki Mazumder:
Genetic multiway partitioning. VLSI Design 1995: 365-369 - 1994
- [j23]Pinaki Mazumder:
Guest editor's introduction. J. Electron. Test. 5(4): 319-320 (1994) - [j22]Kanad Chakraborty, Pinaki Mazumder:
Technology and layout-related testing of static random-access memories. J. Electron. Test. 5(4): 347-365 (1994) - [j21]Raja Venkateswaran, Pinaki Mazumder:
A survey of DA techniques for PLD and FPGA based systems. Integr. 17(3): 191-240 (1994) - [c16]Henrik Esbensen, Pinaki Mazumder:
A Genetic Algorithm for the Steiner Problem in a Graph. EDAC-ETC-EUROASIC 1994: 402-406 - [c15]Heming Chan, Pinaki Mazumder:
A Systolic Architecture for High Speed Hypergraph Partitioning Using a Genetic Algorithm. Evo Workshops 1994: 109-126 - [c14]Henrik Esbensen, Pinaki Mazumder:
SAGA: A Unification of the Genetic Algorithm with Simulated Annealing and its Application to Macro-Cell Placement. VLSI Design 1994: 211-214 - 1993
- [j20]Pinaki Mazumder, John P. Hayes:
Guest Editor's Introduction: Testing and Improving the Testability of Multimegabit Memories. IEEE Des. Test Comput. 10(1): 6-7 (1993) - [j19]Pinaki Mazumder:
Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit. IEEE Trans. Computers 42(12): 1453-1468 (1993) - [j18]Pinaki Mazumder, Jih-Shyr Yih:
A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(1): 124-136 (1993) - [j17]Pinaki Mazumder, Jih-Shyr Yih:
Restructuring of square processor arrays by built-in self-repair circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(9): 1255-1265 (1993) - [j16]Sundarar Mohan, Pinaki Mazumder:
Wolverines: standard cell placement on a network of workstations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(9): 1312-1326 (1993) - [j15]Sundarar Mohan, Pinaki Mazumder:
Analytical and simulation studies of failure modes in SRAMs using high electron mobility transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12): 1885-1896 (1993) - [j14]Raja Venkateswaran, Pinaki Mazumder:
Coprocessor design for multilayer surface-mounted PCB routing. IEEE Trans. Very Large Scale Integr. Syst. 1(1): 31-45 (1993) - [c13]Khushro Shahookar, W. Khamisani, Pinaki Mazumder, Sudhakar M. Reddy:
Genetic Beam Search for Gate Matrix Layout. VLSI Design 1993: 208-213 - 1992
- [j13]Pinaki Mazumder, Janak H. Patel:
An efficient design of embedded memories and their testability analysis using Markov chains. J. Electron. Test. 3(3): 235-250 (1992) - [j12]Raja Venkateswaran, Pinaki Mazumder, K. G. Shin:
Restructuring WSI hexagonal processor arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(12): 1574-1585 (1992) - [c12]Sundarar Mohan, Pinaki Mazumder:
Wolverines: standard cell placement on a network of workstations. EURO-DAC 1992: 46-51 - [c11]Pinaki Mazumder:
An Integrated Built-In Self-Testing and Self-Repair of VLSI/WSI Hexagonal Arrays. ITC 1992: 968-977 - 1991
- [j11]Khushro Shahookar, Pinaki Mazumder:
VLSI Cell Placement Techniques. ACM Comput. Surv. 23(2): 143-220 (1991) - [j10]Heming Chan, Pinaki Mazumder, Khushro Shahookar:
Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosome. Integr. 12(1): 49-77 (1991) - [c10]Sundarar Mohan, Pinaki Mazumder:
Fault Modeling and Testing of GaAs Static Random Access Memories. ITC 1991: 665-674 - 1990
- [j9]Pinaki Mazumder, Janak H. Patel, Jacob A. Abraham:
A reconfigurable parallel signature analyzer for concurrent error correction in DRAM. IEEE J. Solid State Circuits 25(3): 866-870 (1990) - [j8]Khushro Shahookar, Pinaki Mazumder:
A genetic approach to standard cell placement using meta-genetic parameter optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(5): 500-511 (1990) - [j7]Raja Venkateswaran, Pinaki Mazumder:
A hexagonal array machine for multilayer wire routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(10): 1096-1112 (1990) - [j6]Jih-Shyr Yih, Pinaki Mazumder:
A neural network design for circuit partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(12): 1265-1271 (1990) - [c9]Khushro Shahookar, Pinaki Mazumder:
GASP: a Genetic Algorithm for Standard cell Placement. EURO-DAC 1990: 660-664 - [c8]R. B. Panwar, Pinaki Mazumder:
A Parallel Karmarkar Algorithm on Orthogonal Tree Networks. ICPP (3) 1990: 274-277 - [c7]Pinaki Mazumder, Jih-Shyr Yih:
A novel built-in self-repair approach to VLSI memory yield enhancement. ITC 1990: 833-841
1980 – 1989
- 1989
- [j5]Pinaki Mazumder, Janak H. Patel:
Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. IEEE Trans. Computers 38(3): 394-407 (1989) - [c6]Jih-Shyr Yih, Pinaki Mazumder:
A Neural Network Design for Circuit Partitioning. DAC 1989: 406-411 - [c5]Pinaki Mazumder, Jih-Shyr Yih:
Neural computing for built-in self-repair of embedded memory arrays. FTCS 1989: 480-487 - [c4]Raja Venkateswaran, Pinaki Mazumder:
HAM-a hardware accelerator for multi-layer wire routing. ICCAD 1989: 440-443 - 1988
- [b1]Pinaki Mazumder:
Testing and Fault-Tolerance Aspects of High-Density VLSI Memory. University of Illinois Urbana-Champaign, USA, 1988 - [j4]Pinaki Mazumder:
Parallel testing of parametric faults in a three-dimensional dynamic random-access memory. IEEE J. Solid State Circuits 23(4): 933-941 (1988) - [j3]Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs:
Methodologies for testing embedded content addressable memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1): 11-20 (1988) - [c3]Pinaki Mazumder:
An On-Chip Double-Bit Error-Correcting Code for Three-Dimensional Dynamic Random-Access Memory. ITC 1988: 279-288 - 1987
- [j2]Pinaki Mazumder:
Planar decomposition for quadtree data structure. Comput. Vis. Graph. Image Process. 38(3): 258-274 (1987) - [j1]Pinaki Mazumder:
Evaluation of On-Chip Static Interconnection Networks. IEEE Trans. Computers 36(3): 365-369 (1987) - [c2]Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs:
Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories. DAC 1987: 689-694 - 1986
- [c1]Pinaki Mazumder:
Evaluation of Three Interconnection Networks for CMOS VLSI Implementation. ICPP 1986: 200-207
Coauthor Index
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