BibTeX records: Xinyu Liu 0004

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@article{DBLP:journals/access/HeGJSL25,
  author       = {Ben He and
                  Xuan Guo and
                  Hanbo Jia and
                  Kai Sun and
                  Xinyu Liu},
  title        = {A 500MS/s 14-bit Pipelined {ADC} With Startup Protection Circuit in
                  40 nm {CMOS}},
  journal      = {{IEEE} Access},
  volume       = {13},
  pages        = {43097--43108},
  year         = {2025},
  url          = {https://doi.org/10.1109/ACCESS.2025.3548843},
  doi          = {10.1109/ACCESS.2025.3548843},
  timestamp    = {Tue, 08 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/access/HeGJSL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/WangZHXLYLLL25,
  author       = {Zedong Wang and
                  Xuqiang Zheng and
                  Yu He and
                  Hua Xu and
                  Sai Li and
                  Zunsong Yang and
                  Fangxu Lv and
                  Mingche Lai and
                  Xinyu Liu},
  title        = {A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Injection-Locked
                  Clock Multiplier Utilizing a Complementary-Injection Scheme and an
                  Adaptive Pulsewidth Adjustment},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {60},
  number       = {3},
  pages        = {799--812},
  year         = {2025},
  url          = {https://doi.org/10.1109/JSSC.2024.3486291},
  doi          = {10.1109/JSSC.2024.3486291},
  timestamp    = {Tue, 08 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/WangZHXLYLLL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/XuLZWXLLLLWGWJL25,
  author       = {Hua Xu and
                  Mingche Lai and
                  Xuqiang Zheng and
                  Zedong Wang and
                  Jiang Xu and
                  Sai Li and
                  Fangxu Lv and
                  Min Liu and
                  Weijie Li and
                  Zhanhao Wen and
                  Xuan Guo and
                  Xinhua Wang and
                  Zhi Jin and
                  Xinyu Liu},
  title        = {A 112-Gb/s {PAM-4} Retimer Transceiver With Jitter-Filtering Clocking
                  Scheme and {BER} Optimization Technique in 28-nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {60},
  number       = {7},
  pages        = {2305--2318},
  year         = {2025},
  url          = {https://doi.org/10.1109/JSSC.2025.3555383},
  doi          = {10.1109/JSSC.2025.3555383},
  timestamp    = {Sat, 09 Aug 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/XuLZWXLLLLWGWJL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/HeGJL25,
  author       = {Ben He and
                  Xuan Guo and
                  Hanbo Jia and
                  Xinyu Liu},
  title        = {A 100-MHz bandwidth continuous-time sigma-delta {ADC} with 1 {V} supply
                  in 28 nm {CMOS}},
  journal      = {Microelectron. J.},
  volume       = {158},
  pages        = {106597},
  year         = {2025},
  url          = {https://doi.org/10.1016/j.mejo.2025.106597},
  doi          = {10.1016/J.MEJO.2025.106597},
  timestamp    = {Tue, 08 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/HeGJL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/SuGJMWSL25,
  author       = {Qing Su and
                  Xuan Guo and
                  Hanbo Jia and
                  Heping Ma and
                  Linzhen Wu and
                  Kai Sun and
                  Xinyu Liu},
  title        = {A 500 MS/s 12b single channel SAR-assisted pipelined {ADC} with two-stage
                  open-loop dynamic amplifier},
  journal      = {Microelectron. J.},
  volume       = {160},
  pages        = {106659},
  year         = {2025},
  url          = {https://doi.org/10.1016/j.mejo.2025.106659},
  doi          = {10.1016/J.MEJO.2025.106659},
  timestamp    = {Fri, 09 May 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/SuGJMWSL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/ZhangGJLWWL25,
  author       = {Yuzhen Zhang and
                  Xuan Guo and
                  Hanbo Jia and
                  Li Luo and
                  Linzhen Wu and
                  Dandan Wang and
                  Xinyu Liu},
  title        = {A genetic algorithm-based capacitor mismatch calibration scheme for
                  {SAR} ADCs},
  journal      = {Microelectron. J.},
  volume       = {161},
  pages        = {106725},
  year         = {2025},
  url          = {https://doi.org/10.1016/j.mejo.2025.106725},
  doi          = {10.1016/J.MEJO.2025.106725},
  timestamp    = {Wed, 11 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/ZhangGJLWWL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/DingGLSlJLL25,
  author       = {Jiawei Ding and
                  Xuan Guo and
                  Shan Lu and
                  Qing Su and
                  Tao liu and
                  Hanbo Jia and
                  Yihan Li and
                  Xinyu Liu},
  title        = {A 14-GS/s 8-bit time-interleaved {SAR} {ADC} with multi-path bootstrapped
                  switch and low-jitter sampling {PLL} in 28-nm {CMOS}},
  journal      = {Microelectron. J.},
  volume       = {163},
  pages        = {106770},
  year         = {2025},
  url          = {https://doi.org/10.1016/j.mejo.2025.106770},
  doi          = {10.1016/J.MEJO.2025.106770},
  timestamp    = {Sat, 09 Aug 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/DingGLSlJLL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcasII/LiBHZWLL25,
  author       = {Chenhao Li and
                  Chunyue Bo and
                  Xiaoyu Hu and
                  Xiangcong Zhai and
                  Ke Wei and
                  Xinyu Liu and
                  Weijun Luo},
  title        = {A Depletion-Mode GaN-Based Envelope Tracking Supply Modulator Utilizing
                  a Novel Coupled {PWM} Generator},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {72},
  number       = {5},
  pages        = {778--782},
  year         = {2025},
  url          = {https://doi.org/10.1109/TCSII.2025.3548642},
  doi          = {10.1109/TCSII.2025.3548642},
  timestamp    = {Wed, 11 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasII/LiBHZWLL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/LuWGJCL25,
  author       = {Shan Lu and
                  Danyu Wu and
                  Xuan Guo and
                  Hanbo Jia and
                  Yong Chen and
                  Xinyu Liu},
  title        = {A Quad-Core {VCO} Incorporating Area-Saving Folded S-Shaped Tail Filtering
                  in 28-nm {CMOS}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {33},
  number       = {4},
  pages        = {1162--1166},
  year         = {2025},
  url          = {https://doi.org/10.1109/TVLSI.2024.3498940},
  doi          = {10.1109/TVLSI.2024.3498940},
  timestamp    = {Fri, 09 May 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LuWGJCL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/LiZGJWWL25,
  author       = {Xing Li and
                  Lei Zhou and
                  Xuan Guo and
                  Hanbo Jia and
                  Danyu Wu and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 25-GS/s 8-bit Current-Steering {DAC} With ADC-Based Duty-Cycle Detection
                  in 40-nm {CMOS}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {33},
  number       = {5},
  pages        = {1487--1491},
  year         = {2025},
  url          = {https://doi.org/10.1109/TVLSI.2025.3525706},
  doi          = {10.1109/TVLSI.2025.3525706},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LiZGJWWL25.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/LiGJL24,
  author       = {Zeyu Li and
                  Xuan Guo and
                  Hanbo Jia and
                  Xinyu Liu},
  title        = {A 1.25-GS/s 14-bit pipelined {ADC} using a current-feedback flipped
                  input buffer and large dither technique to achieve high linearity},
  journal      = {{IEICE} Electron. Express},
  volume       = {21},
  number       = {19},
  pages        = {20240457},
  year         = {2024},
  url          = {https://doi.org/10.1587/elex.21.20240457},
  doi          = {10.1587/ELEX.21.20240457},
  timestamp    = {Wed, 27 Nov 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiGJL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/JiangWGJJMSL24,
  author       = {Zilin Jiang and
                  Danyu Wu and
                  Xuan Guo and
                  Hanbo Jia and
                  Shuangbao Jia and
                  Heping Ma and
                  Kai Sun and
                  Xinyu Liu},
  title        = {A wideband front-end with integrated high-voltage assisted input buffer
                  for high-speed {ADC}},
  journal      = {{IEICE} Electron. Express},
  volume       = {21},
  number       = {24},
  pages        = {20240640},
  year         = {2024},
  url          = {https://doi.org/10.1587/elex.21.20240640},
  doi          = {10.1587/ELEX.21.20240640},
  timestamp    = {Tue, 01 Apr 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieiceee/JiangWGJJMSL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/WuJGJL24,
  author       = {Feitong Wu and
                  Hanbo Jia and
                  Xuan Guo and
                  Zilin Jiang and
                  Xinyu Liu},
  title        = {A 12bit 1.6 GS/s pipelined {ADC} with multi-level dither injection
                  achieving 68 dB {SFDR} over {PVT}},
  journal      = {Microelectron. J.},
  volume       = {143},
  pages        = {106048},
  year         = {2024},
  url          = {https://doi.org/10.1016/j.mejo.2023.106048},
  doi          = {10.1016/J.MEJO.2023.106048},
  timestamp    = {Wed, 10 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/WuJGJL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/mj/ZhangGHJL24,
  author       = {Heng Zhang and
                  Xuan Guo and
                  Ben He and
                  Hanbo Jia and
                  Xinyu Liu},
  title        = {A 1.25-GS/s 10-bit single-channel ring amplifier-based pipelined {ADC}
                  in 28-nm {CMOS}},
  journal      = {Microelectron. J.},
  volume       = {146},
  pages        = {106160},
  year         = {2024},
  url          = {https://doi.org/10.1016/j.mejo.2024.106160},
  doi          = {10.1016/J.MEJO.2024.106160},
  timestamp    = {Fri, 31 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/mj/ZhangGHJL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcasII/LiZGJWWL24,
  author       = {Xing Li and
                  Lei Zhou and
                  Xuan Guo and
                  Hanbo Jia and
                  Danyu Wu and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 16-Bit 5 GS/s {DAC} With Redundant-MSB-Based Digital Pre-Distortion
                  Achieving {SFDR} {\textgreater}61 dBc Up to 2.4 GHz in 40-nm {CMOS}},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {71},
  number       = {12},
  pages        = {4829--4833},
  year         = {2024},
  url          = {https://doi.org/10.1109/TCSII.2024.3427767},
  doi          = {10.1109/TCSII.2024.3427767},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcasII/LiZGJWWL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/LuWGJCL24,
  author       = {Shan Lu and
                  Danyu Wu and
                  Xuan Guo and
                  Hanbo Jia and
                  Yong Chen and
                  Xinyu Liu},
  title        = {A 28-nm Dual-Mode Explicit Class-F{\unicode{8322}}{\unicode{8323}}
                  {VCO} With Low-Loss {CM} Return Path Achieving 70-400-kHz 1/f{\({^3}\)}
                  {PN} Corner Over 4.9-7.3-GHz {TR}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {32},
  number       = {9},
  pages        = {1749--1753},
  year         = {2024},
  url          = {https://doi.org/10.1109/TVLSI.2024.3414158},
  doi          = {10.1109/TVLSI.2024.3414158},
  timestamp    = {Sun, 08 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LuWGJCL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ZhangHGWL23,
  author       = {Heng Zhang and
                  Ben He and
                  Xuan Guo and
                  Danyu Wu and
                  Xinyu Liu},
  title        = {A 1-GS/s 12-bit Single-Channel Pipelined {ADC} in 28-nm {CMOS} With
                  Input-Split Fully Differential Ring Amplifier},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {31},
  number       = {12},
  pages        = {1931--1938},
  year         = {2023},
  url          = {https://doi.org/10.1109/TVLSI.2023.3323568},
  doi          = {10.1109/TVLSI.2023.3323568},
  timestamp    = {Tue, 09 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ZhangHGWL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mwscas/FuWGJFLL23,
  author       = {Da Fu and
                  Danyu Wu and
                  Xuan Guo and
                  Hanbo Jia and
                  Jie Fu and
                  Shan Lu and
                  Xinyu Liu},
  title        = {A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active
                  Hybrid Driver in 28nm {CMOS}},
  booktitle    = {66th {IEEE} International Midwest Symposium on Circuits and Systems,
                  {MWSCAS} 2023, Tempe, AZ, USA, August 6-9, 2023},
  pages        = {541--545},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/MWSCAS57524.2023.10406102},
  doi          = {10.1109/MWSCAS57524.2023.10406102},
  timestamp    = {Tue, 09 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mwscas/FuWGJFLL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/esscirc/0002WZCWZWL21,
  author       = {Jian Luan and
                  Danyu Wu and
                  Xuqiang Zheng and
                  Chen Cai and
                  Linzhen Wu and
                  Lei Zhou and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A Real-Time Output 50-GS/s 8-bit {TI-ADC} with Dedicated Calibration
                  Techniques and Deterministic Latency},
  booktitle    = {47th {ESSCIRC} 2021 - European Solid State Circuits Conference, {ESSCIR}
                  2021, Grenoble, France, September 13-22, 2021},
  pages        = {487--490},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ESSCIRC53450.2021.9567780},
  doi          = {10.1109/ESSCIRC53450.2021.9567780},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/0002WZCWZWL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/esscirc/CaiZCW0ZWL21,
  author       = {Chen Cai and
                  Xuqiang Zheng and
                  Yong Chen and
                  Danyu Wu and
                  Jian Luan and
                  Lei Zhou and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 1.4-Vppd 64-Gb/s {PAM-4} Transmitter with 4-Tap Hybrid {FFE} Employing
                  Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm
                  {CMOS}},
  booktitle    = {47th {ESSCIRC} 2021 - European Solid State Circuits Conference, {ESSCIR}
                  2021, Grenoble, France, September 13-22, 2021},
  pages        = {527--530},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ESSCIRC53450.2021.9567818},
  doi          = {10.1109/ESSCIRC53450.2021.9567818},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/CaiZCW0ZWL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ZhengLZWWZRL20,
  author       = {Xuqiang Zheng and
                  Fangxu Lv and
                  Lei Zhou and
                  DanYu Wu and
                  Jin Wu and
                  Chun Zhang and
                  Woogeun Rhee and
                  Xinyu Liu},
  title        = {Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {6},
  pages        = {1651--1664},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2019.2946226},
  doi          = {10.1109/JSSC.2019.2946226},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ZhengLZWWZRL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ZhengDZWZWLWL20,
  author       = {Xuqiang Zheng and
                  Hao Ding and
                  Feng Zhao and
                  DanYu Wu and
                  Lei Zhou and
                  Jin Wu and
                  Fangxu Lv and
                  Jianye Wang and
                  Xinyu Liu},
  title        = {A 50-112-Gb/s {PAM-4} Transmitter With a Fractional-Spaced {FFE} in
                  65-nm {CMOS}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {7},
  pages        = {1864--1876},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2020.2987712},
  doi          = {10.1109/JSSC.2020.2987712},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ZhengDZWZWLWL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/LiuWZHLGWZWL19,
  author       = {Huasen Liu and
                  DanYu Wu and
                  Lei Zhou and
                  Yinkun Huang and
                  Jian Luan and
                  Xuan Guo and
                  Dong Wang and
                  Xuqiang Zheng and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 10-GS/s 8-bit 4-way interleaved folding {ADC} in 0.18 {\(\mathrm{\mu}\)}m
                  SiGe-BiCMOS},
  journal      = {{IEICE} Electron. Express},
  volume       = {16},
  number       = {3},
  pages        = {20181079},
  year         = {2019},
  url          = {https://doi.org/10.1587/elex.16.20181079},
  doi          = {10.1587/ELEX.16.20181079},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiuWZHLGWZWL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/LiuWZLGWWL19,
  author       = {Huasen Liu and
                  DanYu Wu and
                  Lei Zhou and
                  Jian Luan and
                  Xuan Guo and
                  Dong Wang and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 1 GS/s 12-bit pipelined folding {ADC} with a novel encoding algorithm},
  journal      = {{IEICE} Electron. Express},
  volume       = {16},
  number       = {7},
  pages        = {20181150},
  year         = {2019},
  url          = {https://doi.org/10.1587/elex.16.20181150},
  doi          = {10.1587/ELEX.16.20181150},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiuWZLGWWL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/WangZWMXGLLWL19,
  author       = {Dong Wang and
                  Lei Zhou and
                  DanYu Wu and
                  Chonghe Ma and
                  Jinxin Xue and
                  Xuan Guo and
                  Jian Luan and
                  Huasen Liu and
                  Jin Wu and
                  Xinyu Liu},
  title        = {An 8 GSps 14 bit {RF} {DAC} With IM3{\textless}-62 dBc up to 3.6 GHz},
  journal      = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
  volume       = {66-II},
  number       = {5},
  pages        = {768--772},
  year         = {2019},
  url          = {https://doi.org/10.1109/TCSII.2019.2909354},
  doi          = {10.1109/TCSII.2019.2909354},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/WangZWMXGLLWL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/esscirc/DingZWZWLWL19,
  author       = {Hao Ding and
                  Xuqiang Zheng and
                  DanYu Wu and
                  Lei Zhou and
                  Jin Wu and
                  Fangxu Lv and
                  Jianye Wang and
                  Xinyu Liu},
  title        = {A 112-Gb/s {PAM-4} Transmitter With a 2-Tap Fractional-Spaced {FFE}
                  in 65-nm {CMOS}},
  booktitle    = {45th {IEEE} European Solid State Circuits Conference, {ESSCIRC} 2019,
                  Cracow, Poland, September 23-26, 2019},
  pages        = {195--198},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ESSCIRC.2019.8902616},
  doi          = {10.1109/ESSCIRC.2019.8902616},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/DingZWZWLWL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/WuZLHLGWL19,
  author       = {DanYu Wu and
                  Lei Zhou and
                  Huasen Liu and
                  Yinkun Huang and
                  Jian Luan and
                  Xuan Guo and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 10-GS/s 8-bit SiGe {ADC} with Isolated 4{\texttimes}4 Analog Input
                  Multiplexer},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702485},
  doi          = {10.1109/ISCAS.2019.8702485},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WuZLHLGWL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/chinaf/ZhuWZHWL17,
  author       = {Xiaoge Zhu and
                  DanYu Wu and
                  Lei Zhou and
                  Yinkun Huang and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A four-channel time-interleaved 30-GS/s 6-bit {ADC} in 0.18 {\(\mu\)}m
                  SiGe BiCMOS technology},
  journal      = {Sci. China Inf. Sci.},
  volume       = {60},
  number       = {12},
  pages        = {129401},
  year         = {2017},
  url          = {https://doi.org/10.1007/s11432-016-0711-y},
  doi          = {10.1007/S11432-016-0711-Y},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/chinaf/ZhuWZHWL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/ZhuZWWL17,
  author       = {Xiaoge Zhu and
                  Lei Zhou and
                  DanYu Wu and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 400-MS/s 10-b 8 interleaved {SAR} {ADC} in 0.13 um {CMOS}},
  journal      = {{IEICE} Electron. Express},
  volume       = {14},
  number       = {5},
  pages        = {20170067},
  year         = {2017},
  url          = {https://doi.org/10.1587/elex.14.20170067},
  doi          = {10.1587/ELEX.14.20170067},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieiceee/ZhuZWWL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieiceee/ZhuWZMWLHWL17,
  author       = {Xiaoge Zhu and
                  DanYu Wu and
                  Lei Zhou and
                  Chonghe Ma and
                  Dandan Wang and
                  Jian Luan and
                  Yinkun Huang and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 6 mW 325 MS/s 8 bit {SAR} {ADC} with background offset calibration},
  journal      = {{IEICE} Electron. Express},
  volume       = {14},
  number       = {11},
  pages        = {20170329},
  year         = {2017},
  url          = {https://doi.org/10.1587/elex.14.20170329},
  doi          = {10.1587/ELEX.14.20170329},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ieiceee/ZhuWZMWLHWL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/ZhouLWJXWL16,
  author       = {Lei Zhou and
                  Weizhong Li and
                  DanYu Wu and
                  Fan Jiang and
                  Daojun Xue and
                  Jin Wu and
                  Xinyu Liu},
  title        = {A 30Gsps 6bit {DAC} in SiGe BiCMOS technology},
  booktitle    = {2016 {IEEE} International Conference on Electronics, Circuits and
                  Systems, {ICECS} 2016, Monte Carlo, Monaco, December 11-14, 2016},
  pages        = {37--40},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ICECS.2016.7841126},
  doi          = {10.1109/ICECS.2016.7841126},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/ZhouLWJXWL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/chinaf/JiangWZWJL14,
  author       = {Fan Jiang and
                  DanYu Wu and
                  Lei Zhou and
                  Jin Wu and
                  Zhi Jin and
                  Xinyu Liu},
  title        = {A 4-GS/s 8-bit two-channel time-interleaved folding and interpolating
                  {ADC}},
  journal      = {Sci. China Inf. Sci.},
  volume       = {57},
  number       = {1},
  pages        = {1--6},
  year         = {2014},
  url          = {https://doi.org/10.1007/s11432-013-5019-y},
  doi          = {10.1007/S11432-013-5019-Y},
  timestamp    = {Fri, 13 Jun 2025 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/chinaf/JiangWZWJL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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