VHDL Placement Directives for Parametric IP Blocks. - Hwang, James; Patterson, Cameron; Mitra, Sujoy (1999)

Hierarchical Placement Directives for Parametric IP Blocks. - Hwang, James; Patterson, Cameron; Mitra, Sujoy (1999)

Generating Layouts for Self-implementing Modules. - Hwang, James; Patterson, Cameron; Mohan, S.; Dellinger, Eric; Mitra, Sujoy; Wittig, Ralph (1998)

Substrate-aware mixed-signal macrocell placement in WRIGHT. - Mitra, Sujoy; Rutenbar, Rob A.; Carley, L. Richard; Allstot, David J. (IEEE J. Solid State Circuits, 1995)

Testability-oriented channel routing. - Khare, Jitendra; Mitra, Sujoy; Nag, Pranab K.; Maly, U.; Rutenbar, Rob A. (1995)

System-level routing of mixed-signal ASICs in WREN. - Mitra, Sujoy; Nag, Sudip; Rutenbar, Rob A.; Carley, L. Richard (1992)