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ORCIDFeng Lu 0002
Person information
- affiliation: Cadence Design Systems, USA
- affiliation (PhD 2006): University of California, Santa Barbara, CA, USA
Other persons with the same name
- Feng Lu — disambiguation page
- Feng Lu 0001 — York University, Department of Computer Science, North York, ON, Canada (and 1 more)
- Feng Lu 0003
![[0000-0001-9349-1758]](https://dblp.org/img/orcid-mark.12x12.png "0000-0001-9349-1758")
— Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan, China - Feng Lu 0004 — Fujian Collaborative Innovation Center for Big Data Applications in Governments, Fuzhou, China (and 1 more)
- Feng Lu 0005 — Beihang University, School of Computer Science and Engineering, State Key Laboratory of Virtual Reality Technology and Systems, Beijing, China (and 1 more)
- Feng Lu 0006 — Nanjing University of Aeronautics and Astronautics, Jiangsu Province Key Laboratory of Aerospace Power Systems, China
- Feng Lu 0007 — Georgia Institute of Technology, Atlanta, GA, USA
- Feng Lu 0008 — Nanjing University of Posts and Telecommunications, School of Electronic Science and Engineering, China
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2000 – 2009
- 2009
[j4]Feng Lu, Kwang-Ting Cheng:
SEChecker: A Sequential Equivalence Checking Framework Based on Kth Invariants. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 733-746 (2009)- 2007
- [j3]Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng:
Multiple-Fault Diagnosis Based On Adaptive Diagnostic Test Pattern Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5): 932-942 (2007) - 2006
- [j2]Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng:
Pseudofunctional testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1535-1546 (2006) - [c8]Feng Lu, Kwang-Ting Cheng:
IChecker: An Efficient Checker for Inductive Invariants. HLDVT 2006: 176-180 - 2005
- [c7]Yung-Chieh Lin, Feng Lu, Kai Yang, Kwang-Ting Cheng:
Constraint extraction for pseudo-functional scan-based delay testing. ASP-DAC 2005: 166-171 - [c6]Feng Lu, Madhu K. Iyer, Ganapathy Parthasarathy, Li-C. Wang, Kwang-Ting Cheng, Kuang-Chien Chen:
An Efficient Sequential SAT Solver With Improved Search Strategies. DATE 2005: 1102-1107 - [c5]Feng Lu, Kwang-Ting (Tim) Cheng:
Sequential equivalence checking based on k-th invariants and circuit SAT solving. HLDVT 2005: 45-51 - [c4]Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng:
Accurate Diagnosis of Multiple Faults. ICCD 2005: 153-156 - [c3]Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng:
Pseudo-Functional Scan-based BIST for Delay Fault. VTS 2005: 229-234 - 2004
- [j1]Feng Lu, Li-C. Wang, Kwang-Ting (Tim) Cheng, John Moondanos, Ziyad Hanna:
A Signal Correlation Guided Circuit-SAT Solver. J. Univers. Comput. Sci. 10(12): 1629-1654 (2004) - 2003
- [c2]Feng Lu, Li-C. Wang, Kwang-Ting Cheng, John Moondanos, Ziyad Hanna:
A signal correlation guided ATPG solver and its applications for solving difficult industrial cases. DAC 2003: 436-441 - [c1]Feng Lu, Li-C. Wang, Kwang-Ting Cheng, Ric C.-Y. Huang:
A Circuit SAT Solver With Signal Correlation Guided Learning. DATE 2003: 10892-10897
Coauthor Index
aka: Kwang-Ting (Tim) Cheng
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